When the watchdog times out, it will generate a short reset pulse of one CK cycle duration. On the falling edge of this pulse, the delay timer starts counting the time-out period tTOUT. Refer to Section 10.8 “Watchdog Timer” on page 43 for details on operation of the watchdog timer.
Figure 10-6. Watchdog System Reset During Operation
VCC
RESET
1 CK Cycle
WDT TIME-OUT
tTOUT RESET Time-OUT
INTERNAL RESET
10.7 Internal Voltage Reference
Atmel® ATmega328P features an internal bandgap reference. This reference is used for brown-out detection, and it can be used as an input to the analog comparator or the ADC.
10.7.1 Voltage Reference Enable Signals and Start-up Time
The voltage reference has a start-up time that may influence the way it should be used. The start-up time is given in Section 28.6 “System and Reset Characteristics” on page 261. To save power, the reference is not always turned on. The reference is on during the following situations: 1. When the BOD is enabled (by programming the BODLEVEL [2:0] Fuses). 2. When the bandgap reference is connected to the analog comparator (by setting the ACBG bit in ACSR). 3. When the ADC is enabled. Thus, when the BOD is not enabled, after setting the ACBG bit or enabling the ADC, the user must always allow the reference to start up before the output from the analog comparator or ADC is used. To reduce power consumption in power-down mode, the user can avoid the three conditions above to ensure that the reference is turned off before entering power-down mode.
10.8 Watchdog Timer
10.8.1 Features ● Clocked from separate on-chip oscillator ● 3 operating modes ● Interrupt ● System reset ● Interrupt and system reset ● Selectable time-out period from 16ms to 8s ● Possible hardware fuse watchdog always on (WDTON) for fail-safe mode
