HEF4060B

14-stage ripple-carry binary counter/divider and oscillator

Rev. 9 — 8 July 2019 Product data sheet

1. General description
The HEF4060B is a 14-stage ripple-carry binary counter/divider and oscillator with three oscillator
terminals (RS, REXT and CEXT), ten buffered outputs (Q3 to Q9 and Q11 to Q13) and an
overriding asynchronous master reset input (MR).
The oscillator configuration allows design of either RC or crystal oscillator circuits. The oscillator
may be replaced by an external clock signal at input RS. The clock input' s Schmitt-trigger action
makes it highly tolerant to slower clock rise and fall times. The counter advances on the negative-
going transition of RS. A HIGH level on MR resets the counter (Q3 to Q9 and Q11 to Q13 = LOW),
independent of other input conditions.
It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS (usually
ground). Unused inputs must be connected to VDD, VSS, or another input.

2. Features and benefits

• Tolerant of slow clock rise and fall times
• Fully static operation
• 5 V, 10 V, and 15 V parametric ratings
• Standardized symmetrical output characteristics
• Inputs and outputs are protected against electrostatic effects
• Specified from -40 ° C to +85 ° C
• Complies with JEDEC standard JESD 13-B

3. Ordering information
Table 1. Ordering information
All types operate from -40 ° C to +85 ° C.
Type number Package
Name Description Version
HEF4060BT SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1
HEF4060BTT TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1
Nexperia HEF4060B
14-stage ripple-carry binary counter/divider and oscillator

4. Functional diagram
10 9

REXT CEXT

RS
11
CP 14-STAGE BINARY COUNTER
CD
MR
12
Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q11 Q12 Q13

7 5 4 6 14 13 15 1 2 3
001aae652

Fig. 1. Functional diagram

CEXT
REXT
FF1 FF4 FF10 FF12 FF14
RS
CP CP CP CP CP
Q Q Q Q Q
CD CD CD CD CD

MR Q3 Q9 Q11 Q13
001aae654

Fig. 2. Logic diagram

5. Pinning information

5.1. Pinning
HEF4060B

Q11 1 16 VDD

Q12 2 15 Q9 HEF4060B

Q13 3 14 Q7
Q11 1 16 VDD
Q5 4 13 Q8 Q12 2 15 Q9
Q13 3 14 Q7
Q4 5 12 MR
Q5 4 13 Q8
Q6 6 11 RS Q4 5 12 MR
Q6 6 11 RS
Q3 7 10 REXT
Q3 7 10 REXT
VSS 8 9 CEXT VSS 8 9 CEXT

001aae653 aaa-030139

Fig. 3. Pin configuration SOT109-1 (SO16) Fig. 4. Pin configuration SOT403-1 (TSSOP16)

HEF4060B All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2019. All rights reserved

Product data sheet Rev. 9 — 8 July 2019 2 / 14

Nexperia HEF4060B
14-stage ripple-carry binary counter/divider and oscillator

5.2. Pin description

Table 2. Pin description
Symbol Pin Description
Q11 to Q13 1, 2, 3 counter output
Q3 to Q9 7, 5, 4, 6, 14, 13, 15 counter output
VSS 8 ground supply voltage
CEXT 9 external capacitor connection
REXT 10 oscillator pin
RS 11 clock input/oscillator pin
MR 12 master reset
VDD 16 supply voltage

6. Functional description
Table 3. Function table
H = HIGH voltage level; L = LOW voltage level; ↑ = LOW-to-HIGH clock transition; ↓ HIGH-to-LOW clock transition.
Input Output
RS MR Q3 to Q9 and Q11 to Q13
↑ L no change
↓ L count
X H L

7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VDD supply voltage -0.5 +18 V
IIK input clamping current VI < -0.5 V or VI > VDD + 0.5 V - ±10 mA
VI input voltage -0.5 VDD + 0.5 V
IOK output clamping current VO < -0.5 V or VO > VDD + 0.5 V - ±10 mA
II/O input/output current - ±10 mA
IDD supply current - 50 mA
Tstg storage temperature -65 +150 °C
Tamb ambient temperature -40 +85 °C
Ptot total power dissipation Tamb -40 °C to +85 °C [1] - 500 mW
P power dissipation per output - 100 mW

[1] For SOT109-1 (SO16) package: Ptot derates linearly with 12.4 mW/K above 110 °C.
For SOT403-1 (TSSOP16) package: Ptot derates linearly with 8.5 mW/K above 91 °C.

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Product data sheet Rev. 9 — 8 July 2019 3 / 14

Nexperia HEF4060B
14-stage ripple-carry binary counter/divider and oscillator

8. Recommended operating conditions

Table 5. Recommended operating conditions
Symbol Parameter Conditions Min Typ Max Unit
VDD supply voltage 3 - 15 V
VI input voltage 0 - VDD V
Tamb ambient temperature in free air -40 - +85 °C
Δt/ΔV input transition rise and fall input MR
rate VDD = 5 V - - 3.75 µs/V
VDD = 10 V - - 0.5 µs/V
VDD = 15 V - - 0.08 µs/V

9. Static characteristics
Table 6. Static characteristics
VSS = 0 V; VI = VSS or VDD unless otherwise specified.
Symbol Parameter Conditions VDD Tamb = -40 °C Tamb = 25 °C Tamb = 85 °C Unit
Min Max Min Max Min Max
VIH HIGH-level input |IO| < 1 μA 5V 3.5 - 3.5 - 3.5 - V
voltage 10 V 7.0 - 7.0 - 7.0 - V
15 V 11.0 - 11.0 - 11.0 - V
VIL LOW-level input |IO| < 1 μA 5V - 1.5 - 1.5 - 1.5 V
voltage 10 V - 3.0 - 3.0 - 3.0 V
15 V - 4.0 - 4.0 - 4.0 V
VOH HIGH-level output |IO| < 1 μA 5V 4.95 - 4.95 - 4.95 - V
voltage 10 V 9.95 - 9.95 - 9.95 - V
15 V 14.95 - 14.95 - 14.95 - V
VOL LOW-level output |IO| < 1 μA 5V - 0.05 - 0.05 - 0.05 V
voltage 10 V - 0.05 - 0.05 - 0.05 V
15 V - 0.05 - 0.05 - 0.05 V
IOH HIGH-level output VO = 2.5 V 5V - -1.7 - -1.4 - -1.1 mA
current VO = 4.6 V 5V - -0.52 - -0.44 - -0.36 mA
VO = 9.5 V 10 V - -1.3 - -1.1 - -0.9 mA
VO = 13.5 V 15 V - -3.6 - -3.0 - -2.4 mA
IOL LOW-level output VO = 0.4 V 5V 0.52 - 0.44 - 0.36 - mA
current VO = 0.5 V 10 V 1.3 - 1.1 - 0.9 - mA
VO = 1.5 V 15 V 3.6 - 3.0 - 2.4 - mA
II input leakage current 15 V - ±0.3 - ±0.3 - ±1.0 µA
IDD supply current IO = 0 A 5V - 20 - 20 - 150 µA
10 V - 40 - 40 - 300 µA
15 V - 80 - 80 - 600 µA
CI input capacitance - - - - 7.5 - - pF

HEF4060B All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2019. All rights reserved

Product data sheet Rev. 9 — 8 July 2019 4 / 14

Nexperia HEF4060B
14-stage ripple-carry binary counter/divider and oscillator

10. Dynamic characteristics

Table 7. Dynamic characteristics
Tamb = 25 °C; VSS = 0 V; CL = 50 pF; tr = tf ≤ 20 ns; unless otherwise specified.
Symbol Parameter Conditions VDD Extrapolation formula[1] Min Typ Max Unit
tpd propagation delay RS → Q3; 5V [2] 183 ns + (0.55 ns/pF) CL - 210 420 ns
see Fig. 5 10 V 69 ns + (0.23 ns/pF) CL - 80 160 ns
15 V 42 ns + (0.16 ns/pF) CL - 50 100 ns
Qn → Qn + 1; 5V - - 25 50 ns
see Fig. 5 10 V - - 10 20 ns
15 V - - 6 12 ns
MR → Qn; 5V 73 ns + (0.55 ns/pF) CL - 100 200 ns
HIGH to LOW 10 V 29 ns + (0.23 ns/pF) CL - 40 80 ns
see Fig. 5
15 V 22 ns + (0.16 ns/pF) CL - 30 60 ns
tt transition time see Fig. 5 5V [3] 10 ns + (1.00 ns/pF) CL - 60 120 ns
10 V 9 ns + (0.42 ns/pF) CL - 30 60 ns
15 V 6 ns + (0.28 ns/pF) CL - 20 40 ns
tW pulse width minimum width; 5 V 120 60 - ns
RS HIGH; 10 V 50 25 - ns
see Fig. 5
15 V 30 15 - ns
minimum width; 5 V 50 25 - ns
MR HIGH; 10 V 30 15 - ns
see Fig. 5
15 V 20 10 - ns
trec recovery time input MR; 5V 160 80 - ns
see Fig. 5 10 V 80 40 - ns
15 V 60 30 - ns
fmax maximum frequency input RS; 5V 4 8 - MHz
see Fig. 5 10 V 10 20 - MHz
15 V 15 30 - MHz

[1] The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (CL in pF).
[2] tpd is the same as tPHL and tPLH.
[3] tt is the same as tTHL and tTLH.

HEF4060B All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2019. All rights reserved

Product data sheet Rev. 9 — 8 July 2019 5 / 14

Nexperia HEF4060B
14-stage ripple-carry binary counter/divider and oscillator

Table 8. Power dissipation

Dynamic power dissipation PD and total power dissipation Ptot can be calculated from the formulas shown. Tamb = 25 °C.
Symbol Parameter Conditions VDD Typical formula for PD and Ptot (μW)[1]
2
PD dynamic power per device 5V PD = 700 x fi + ∑(fo x CL) x VDD
dissipation 10 V PD = 3300 x fi + ∑(fo x CL) x VDD
2

2
15 V PD = 8900 x fi + ∑(fo x CL) x VDD
2 2
Ptot total power when using 5V Ptot = 700 x fosc + ∑(fo x CL) x VDD + 2 x Ct x VDD x fosc + 690 x VDD
dissipation the on-chip 10 V Ptot = 3300 x fosc + ∑(fo x CL) x VDD + 2 x Ct x VDD x fosc + 6900 x VDD
2 2
oscillator 2 2
15 V Ptot = 8900 x fosc + ∑(fo x CL) x VDD + 2 x Ct x VDD x fosc + 22000 x VDD

[1] Where:
fi = input frequency in MHz; fo = output frequency in MHz;
CL = output load capacitance in pF;
VDD = supply voltage in V;
∑(fo x CL) = sum of the outputs;
Ct = timing capacitance (pF);
fosc = oscillator frequency (MHz).

10.1. Waveforms and test circuit

tr tf

90 %
MR input VM
10 %
tW
trec 1/fmax

RS input VM

tW
tPHL tPLH tPHL
90 %
Qn output
VM
10 %
tt tt
001aaj472

Measurement points are given in Table 9.

Fig. 5. Waveforms showing propagation delays for MR to Qn and CP to Q0, minimum MR, and CP pulse widths

Table 9. Measurement points

Supply voltage Input Output
VDD VM VM
5 V to 15 V 0.5VDD 0.5VDD

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Product data sheet Rev. 9 — 8 July 2019 6 / 14

Nexperia HEF4060B
14-stage ripple-carry binary counter/divider and oscillator

VDD

VI VO
G DUT

RT CL

001aag182

Test data is given in Table 10.

Definitions for test circuit:
DUT = Device Under Test;
CL = load capacitance including jig and probe capacitance;
RT = termination resistance should be equal to the output impedance Zo of the pulse generator.
Fig. 6. Test circuit for measuring switching times

Table 10. Measurement point and test data

Supply voltage Input Load
VDD VI tr, tf CL
5 V to 15 V VSS or VDD ≤ 20 ns 50 pF

11. RC oscillator
HEF4060B
MR (from logic)

11 RS

REXT CEXT
10 9

C2 R2 Rt Ct

001aae655

Typical formula for oscillator frequency:

Fig. 7. External component connection for RC oscillator

11.1. Timing component limitations

The oscillator frequency is mainly determined by Rt x Ct, provided Rt << R2 and R2 x C2 << Rt x Ct.
The influence of the forward voltage across the input protection diodes on the frequency is
minimized by R2. The stray capacitance C2 should be kept as small as possible. In consideration
of accuracy, Ct must be larger than the inherent stray capacitance. Rt must be larger than the
LOCMOS (Local Oxidation Complementary Metal-Oxide Semiconductor) 'ON' resistance in series
with it, which typically is 500 Ω at VDD = 5 V, 300 Ω at VDD = 10 V and 200 Ω at VDD = 15 V.
The recommended values for these components to maintain agreement with the typical oscillation
formula are:
• Ct ≥ 100 pF, up to any practical value,
• 10 kΩ ≤ Rt ≤ 1 MΩ.

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Product data sheet Rev. 9 — 8 July 2019 7 / 14

Nexperia HEF4060B
14-stage ripple-carry binary counter/divider and oscillator

11.2. Typical crystal oscillator circuit

In Fig. 8, R2 is the power limiting resistor. For starting and maintaining oscillation a minimum
transconductance is necessary.

MR (from logic)
HEF4060B
Rbias

560 kΩ
11 RS
REXT VDD

Rbias 10
0.47 µF 100 µF
100 kΩ to
1 MΩ R2 2.2 kΩ Vi input output
A io
(f = 1 kHz)
VSS
22 pF to 001aae657
C3 37 pF C2 100 pF

gfs = dio/dvi at vo is constant (see also Fig. 10);

001aae656 MR = LOW.
Fig. 8. External component connection for crystal Fig. 9. Test setup for measuring forward
oscillator transconductance (gfs)

001aae658
12.5
gfs
(mA/V) 001aae659
105
10
(1)
fosc Rt
(Hz)

7.5 104
(2)
Ct

5 (3)
103

2.5

102

0
0 5 10 15
VDD (V)
10 3
Tamb = 25 °C. 10 104 105 Rt (Ω) 106
10- 4 10- 3 10- 2 Ct (µF) 10- 1
(1) Average + 2 σ.
(2) Average. Ct curve at Rt = 100 kΩ; R2 = 470 kΩ.
(3) Average - 2 σ. Rt curve at Ct = 1 nF; R2 = 5 Rt.
Where ‘ σ’ is the observed standard deviation. VDD = 5 V to 15 V; Tamb = 25 °C.
Fig. 10. Typical forward transconductance gfs as a Fig. 11. RC oscillator frequency as a function of
function of the supply voltage Rt and Ct

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Product data sheet Rev. 9 — 8 July 2019 8 / 14

Nexperia HEF4060B
14-stage ripple-carry binary counter/divider and oscillator

001aae660
8
(1)
Δfosc
(%)
4
(2)
(3)
(4)
0
(5)

-4
(6)

-8

- 12
- 50 0 50 100 150
Tamb (°C)

Lines (1) and (2): VDD = 15 V.

Lines (3) and (4): VDD = 10 V.
Lines (5) and (6): VDD = 5 V.
Lines (1), (3), (6): Rt = 100 kΩ; Ct = 1 nF; R2 = 0 Ω.
Lines (2), (4), (5): Rt = 100 kΩ; Ct = 1 nF; R2 = 300 kΩ.
Referenced at: fosc at Tamb = 25 °C and VDD = 10 V.
Fig. 12. Oscillator frequency deviation (Δfosc) as a function of ambient temperature

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Product data sheet Rev. 9 — 8 July 2019 9 / 14

Nexperia HEF4060B
14-stage ripple-carry binary counter/divider and oscillator

12. Package outline

SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1

D E A
X

y HE v M A

16 9

Q
A2
(A 3) A
A1
pin 1 index
θ
Lp

1 8 L

e w M detail X
bp

0 2.5 5 mm
scale

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

A
UNIT A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ
max.
0.25 1.45 0.49 0.25 10.0 4.0 6.2 1.0 0.7 0.7
mm 1.75 0.25 1.27 1.05 0.25 0.25 0.1
0.10 1.25 0.36 0.19 9.8 3.8 5.8 0.4 0.6 0.3 8
o
o
0.010 0.057 0.019 0.0100 0.39 0.16 0.244 0.039 0.028 0.028 0
inches 0.069 0.01 0.05 0.041 0.01 0.01 0.004
0.004 0.049 0.014 0.0075 0.38 0.15 0.228 0.016 0.020 0.012

Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.

OUTLINE REFERENCES EUROPEAN

ISSUE DATE
VERSION IEC JEDEC JEITA PROJECTION

99-12-27
SOT109-1 076E07 MS-012
03-02-19

Fig. 13. Package outline SOT109-1 (SO16)

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Product data sheet Rev. 9 — 8 July 2019 10 / 14

Nexperia HEF4060B
14-stage ripple-carry binary counter/divider and oscillator

TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1

D E A
X

y HE v M A

16 9

Q
A2 (A 3 )
A
A1
pin 1 index

θ
Lp
L
1 8
detail X
w M
e bp

0 2.5 5 mm
scale

DIMENSIONS (mm are the original dimensions)

A
UNIT A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ
max.

mm
0.15 0.95 0.30 0.2 5.1 4.5 6.6 0.75 0.4 0.40 8o
1.1 0.25 0.65 1 0.2 0.13 0.1
0.05 0.80 0.19 0.1 4.9 4.3 6.2 0.50 0.3 0.06 0o

Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.

OUTLINE REFERENCES EUROPEAN

ISSUE DATE
VERSION IEC JEDEC JEITA PROJECTION

99-12-27
SOT403-1 MO-153
03-02-18

Fig. 14. Package outline SOT403-1 (TSSOP16)

HEF4060B All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2019. All rights reserved

Product data sheet Rev. 9 — 8 July 2019 11 / 14

Nexperia HEF4060B
14-stage ripple-carry binary counter/divider and oscillator

13. Revision history

Table 11. Revision history
Document ID Release date Data sheet status Change notice Supersedes
HEF4060B v.9 20190708 Product data sheet - HEF4060B v.8
Modifications: • Type number HEF4060BTT (SOT403-1/TSSOP16) added.
HEF4060B v.8 20160325 Product data sheet - HEF4060B v.7
Modifications: • Type number HEF4060BP (SOT38-4) removed.
HEF4060B v.7 20111116 Product data sheet - HEF4060B v.6
Modifications: • Legal pages updated.
• Changes in "General description" and "Features and benefits".
• Section "Applications" removed.
HEF4060B v.6 20110511 Product data sheet - HEF4060B v.5
HEF4060B v.5 20091127 Product data sheet - HEF4060B v.4
HEF4060B v.4 20090817 Product data sheet - HEF4060B_CNV v.3
HEF4060B_CNV v.3 19950101 Product specification - HEF4060B_CNV v.2
HEF4060B_CNV v.2 19950101 Product specification - -

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Product data sheet Rev. 9 — 8 July 2019 12 / 14

Nexperia HEF4060B
14-stage ripple-carry binary counter/divider and oscillator
injury, death or severe property or environmental damage. Nexperia and its

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such equipment or applications and therefore such inclusion and/or use is at
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document, and as such is not complete, exhaustive or legally binding.
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[1][2] status [3] products are for illustrative purposes only. Nexperia makes no representation
Objective [short] Development This document contains data from or warranty that such applications will be suitable for the specified use
data sheet the objective specification for without further testing or modification.
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Product data sheet Rev. 9 — 8 July 2019 13 / 14

Nexperia HEF4060B
14-stage ripple-carry binary counter/divider and oscillator

Contents
1. General description...................................................... 1
2. Features and benefits.................................................. 1
3. Ordering information....................................................1
4. Functional diagram.......................................................2
5. Pinning information......................................................2
5.1. Pinning.........................................................................2
5.2. Pin description............................................................. 3
6. Functional description................................................. 3
7. Limiting values............................................................. 3
8. Recommended operating conditions..........................4
9. Static characteristics....................................................4
10. Dynamic characteristics............................................ 5
10.1. Waveforms and test circuit........................................ 6
11. RC oscillator................................................................7
11.1. Timing component limitations.....................................7
11.2. Typical crystal oscillator circuit...................................8
12. Package outline........................................................ 10
13. Revision history........................................................12
14. Legal information......................................................13

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Date of release: 8 July 2019

HEF4060B All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2019. All rights reserved

Product data sheet Rev. 9 — 8 July 2019 14 / 14