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MAX3243
SLLS350O – APRIL 1999 – REVISED JANUARY 2015

MAX3243 3-V to 5.5-V Multichannel RS-232 Line Driver/Receiver With ±15-kV ESD (HBM)
Protection
1 Features 2 Applications
•
1 Operates With 3-V to 5.5-V VCC Supply • Battery-Powered Systems
• Single-Chip and Single-Supply Interface • Tablets
for IBM™ PC/AT™ Serial Port • Notebooks
• RS-232 Bus-Pin ESD Protection of • Laptops
±15 kV Using Human-Body Model (HBM) • Hand-Held Equipment
• Meets or Exceeds the Requirements of
TIA/EIA-232-F and ITU V.28 Standards 3 Description
• Three Drivers and Five Receivers The MAX3243 device consists of three line drivers,
• Operates Up To 250 kbit/s five line receivers which is ideal for DE-9 DTE
interface. ±15-kV ESD (HBM) protection pin to pin
• Low Active Current: 300 μA Typical
(serial- port connection pins, including GND). Flexible
• Low Standby Current: 1 μA Typical power features saves power automatically. Special
• External Capacitors: 4 × 0.1 μF outputs ROUT2B and INVALID are always enabled to
• Accepts 5-V Logic Input With 3.3-V Supply allow checking for ring indicator and valid RS232
input.
• Always-Active Noninverting Receiver
Output (ROUT2B) Device Information(1)
• Operating Temperature PART NUMBER PACKAGE (PIN) BODY SIZE
– MAX3243C: 0°C to 70°C SSOP (28) 10.29 mm × 5.30 mm
– MAX3243I: –40°C to 85°C MAX3243 SOIC (28) 17.90 mm × 7.50 mm
• Serial-Mouse Driveability TSSOP (28) 9.70 mm × 4.40 mm
• Auto-Powerdown Feature to Disable Driver (1) For all available packages, see the orderable addendum at
Outputs When No Valid RS-232 Signal Is the end of the data sheet.
Sensed

4 Simplified Diagram
3.3 V, 5 V

FORCEON POWER

FORCEOFF

3 3 DOUT
DIN TX
RS232

5 5 RIN
ROUT RX
RS232

INVALID STATUS

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
MAX3243
SLLS350O – APRIL 1999 – REVISED JANUARY 2015 www.ti.com

Table of Contents
1 Features .................................................................. 1 8 Parameter Measurement Information .................. 8
2 Applications ........................................................... 1 9 Detailed Description ............................................ 11
3 Description ............................................................. 1 9.1 Overview ................................................................. 11
4 Simplified Diagram ................................................ 1 9.2 Functional Block Diagram ....................................... 11
5 Revision History..................................................... 2 9.3 Feature Description................................................. 12
9.4 Device Functional Modes........................................ 13
6 Pin Configuration and Functions ......................... 3
7 Specifications......................................................... 4 10 Application and Implementation........................ 14
10.1 Application Information.......................................... 14
7.1 Absolute Maximum Ratings ..................................... 4
10.2 Typical Application ................................................ 14
7.2 ESD Ratings.............................................................. 4
7.3 Recommended Operating Conditions....................... 4 11 Power Supply Recommendations ..................... 16
7.4 Thermal Information .................................................. 4 12 Layout................................................................... 16
7.5 Electrical Characteristics –– Auto Power Down........ 5 12.1 Layout Guidelines ................................................. 16
7.6 Electrical Characteristics –– Driver .......................... 5 12.2 Layout Example .................................................... 17
7.7 Electrical Characteristics –– Receiver ..................... 6 13 Device and Documentation Support ................. 18
7.8 Switching Characteristics –– Auto Power Down ...... 6 13.1 Trademarks ........................................................... 18
7.9 Switching Characteristics –– Driver ......................... 6 13.2 Electrostatic Discharge Caution ............................ 18
7.10 Switching Characteristics –– Receiver ................... 6 13.3 Glossary ................................................................ 18
7.11 Typical Characteristics ............................................ 7 14 Mechanical, Packaging, and Orderable
Information ........................................................... 18

5 Revision History
Changes from Revision N (May 2009) to Revision O Page

• Added Applications, Device Information table, Pin Functions table, ESD Ratings table, Thermal Information table,
Typical Characteristics, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section. ................................................................................................. 1
• Deleted Ordering Information table. ....................................................................................................................................... 1

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6 Pin Configuration and Functions

DB, DW, OR PW PACKAGE
(TOP VIEW)

C2+ 1 28 C1+
C2− 2 27 V+
V− 3 26 VCC
RIN1 4 25 GND
RIN2 5 24 C1−
RIN3 6 23 FORCEON
RIN4 7 22 FORCEOFF
RIN5 8 21 INVALID
DOUT1 9 20 ROUT2B
DOUT2 10 19 ROUT1
DOUT3 11 18 ROUT2
DIN3 12 17 ROUT3
DIN2 13 16 ROUT4
DIN1 14 15 ROUT5

Pin Functions
PIN
TYPE DESCRIPTION
NAME NO.
C2+ 1 — Positive lead of C2 capacitor
C2– 2 — Negative lead of C2 capacitor
V– 3 O Negative charge pump output for storage capacitor only
RIN1:RIN5 4, 5, 6, 7, 8 I RS232 line data input (from remote RS232 system)
DOUT1:DOUT3 9, 10, 11 O RS232 line data output (to remote RS232 system)
DIN3:DIN1 12, 13, 14 I Logic data input (from UART)
ROUT5:ROUT1 15, 16, 17, 18, 19 O Logic data output (to UART)
Always Active non-inverting output for RIN2 (normally used for ring
ROUT2B 20 O
indicator)
INVALID 21 O Active low output when all RIN are unpowered
Low input forces DOUT1-5, ROUT1-5 high Z per Device Functional
FORCEOFF 22 I
Modes
High forces drivers on. Low is automatic mode per Device Functional
FORCEON 23 I
Modes
C1– 24 — Negative lead on C1 capacitor
GND 25 — Ground
VCC 26 — Supply Voltage, Connect to 3V to 5.5V power supply
V+ 27 O Positive charge pump output for storage capacitor only
C1+ 28 — Positive lead of C1 capacitor

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7 Specifications
7.1 Absolute Maximum Ratings
(1)
over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
VCC Supply voltage range (2) –0.3 6 V
(2)
V+ Positive output supply voltage range –0.3 7 V
V– Negative output supply voltage range (2) 0.3 –7 V
V+ – V– Supply voltage difference (2) 13 V
Driver, FORCEOFF, FORCEON –0.3 6
VI Input voltage range V
Receiver –25 25
Driver –13.2 13.2
VO Output voltage range V
Receiver, INVALID –0.3 VCC + 0.3
TJ Operating virtual junction temperature 150 °C
Tstg Storage temperature range –65 150 °C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to network GND.

7.2 ESD Ratings

MAX UNIT
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001
15000
RIN , DOUT, and GND pins (1)
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001
V(ESD) Electrostatic discharge 3000 V
All other pins (1)
Charged device model (CDM), per JEDEC specification JESD22-C101,
1000
all pins (2)

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

(1)
(See Figure 8)
MIN NOM MAX UNIT
VCC = 3.3 V 3 3.3 3.6
VCC Supply voltage V
VCC = 5 V 4.5 5 5.5
DIN, FORCEOFF, VCC = 3.3 V 2 5.5
VIH Driver and control high-level input voltage V
FORCEON VCC = 5 V 2.4 5.5
VIL Driver and control low-level input voltage DIN, FORCEOFF, FORCEON 0 0.8 V
VI Driver and control input voltage DIN, FORCEOFF, FORCEON 0 5.5 V
VI Receiver input voltage –25 25 V
MAX3243C 0 70
TA Operating free-air temperature °C
MAX3243I –40 85

(1) Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.

7.4 Thermal Information

MAX3243
THERMAL METRIC (1) DB DW PW UNIT
16 PINS 16 PINS 16 PINS
RθJA Junction-to-ambient thermal resistance 62 46 62 °C/W

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report (SPRA953).

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7.5 Electrical Characteristics –– Auto Power Down

over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (1) (see Figure 8)
PARAMETER TEST CONDITIONS MIN TYP (2) MAX UNIT
Supply current
Auto-powerdown No load, FORCEOFF and FORCEON at VCC. TA = 25°C 0.3 1 mA
disabled
Supply current
ICC No load, FORCEOFF at GND. TA = 25°C 1 10
Powered off
Supply current No load, FORCEOFF at VCC, FORCEON at GND, μA
Auto-powerdown All RIN are open or grounded, All DIN are grounded. TA = 1 10
enabled 25°C
II Input leakage current
VI = VCC or VI at GND ±0.01 ±1 μA
of FORCEOFF, FORCEON
Receiver input threshold
FORCEON = GND,
VIT+ for INVALID high-level output 2.7 V
FORCEOFF = VCC
voltage
Receiver input threshold
FORCEON = GND,
VIT– for INVALID high-level output –2.7 V
FORCEOFF = VCC
voltage
Receiver input threshold
FORCEON = GND,
VT for INVALID low-level output –0.3 0.3 V
FORCEOFF = VCC
voltage
INVALID high-level output IOH = -1 mA, FORCEON = GND,
VOH VCC – 0.6 V
voltage FORCEOFF = VCC
INVALID low-level output IOL = 1.6 mA, FORCEON = GND,
VOL 0.4 V
voltage FORCEOFF = VCC

(1) Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
(2) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

7.6 Electrical Characteristics –– Driver

over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (1) (see Figure 8)
PARAMETER TEST CONDITIONS MIN TYP (2) MAX UNIT
VOH High-level output voltage All DOUT at RL = 3 kΩ to GND 5 5.4 V
VOL Low-level output voltage All DOUT at RL = 3 kΩ to GND –5 –5.4 V
Output voltage DIN1 = DIN2 = GND, DIN3 = VCC, 3-kΩ to GND at DOUT3,
VO ±5 V
(mouse driveability) DOUT1 = DOUT2 = 2.5 mA
IIH High-level input current VI = VCC ±0.01 ±1 μA
IIL Low-level input current VI at GND ±0.01 ±1 μA
Vhys Input hysteresis ±1 V
VCC = 3.6 V, VO = 0 V
IOS Short-circuit output current (3) ±35 ±60 mA
VCC = 5.5 V, VO = 0 V
ro Output resistance VCC, V+, and V– = 0 V, VO = ±2 V 300 10M Ω
VO = ±12 V, VCC = 3 to 3.6 V ±25
Ioff Output leakage current FORCEOFF = GND, μA
VO = ±10 V, VCC = 4.5 to 5.5 V ±25

(1) Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
(2) All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
(3) Short-circuit durations should be controlled to prevent exceeding the device absolute power dissipation ratings, and not more than one
output should be shorted at a time.

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7.7 Electrical Characteristics –– Receiver

over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (1) (see Figure 8)
PARAMETER TEST CONDITIONS MIN TYP (2) MAX UNIT
VOH High-level output voltage IOH = –1 mA VCC – 0.6 VCC – 0.1 V
VOL Low-level output voltage IOH = 1.6 mA 0.4 V
VCC = 3.3 V 1.6 2.4
VIT+ Positive-going input threshold voltage V
VCC = 5 V 1.9 2.4
VCC = 3.3 V 0.6 1.1
VIT– Negative-going input threshold voltage V
VCC = 5 V 0.8 1.4
Vhys Input hysteresis (VIT+ – VIT–) 0.5 V
Ioff Output leakage current (except ROUT2B) FORCEOFF = 0 V ±0.05 ±10 μA
rI Input resistance VI = ±3 V or ±25 V 3 5 7 kΩ

(1) Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
(2) All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.

7.8 Switching Characteristics –– Auto Power Down

over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 7)
PARAMETER TEST CONDITIONS TYP (1) UNIT
tvalid Propagation delay time, low- to high-level output VCC = 5 V 1 μs
tinvalid Propagation delay time, high- to low-level output VCC = 5 V 30 μs
ten Supply enable time VCC = 5 V 100 μs

(1) All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.

7.9 Switching Characteristics –– Driver

over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (1) (see Figure 8)
MAX3243C, MAX3243I
PARAMETER TEST CONDITIONS MIN TYP (2) MAX UNIT
RL = 3 kΩ CL = 1000 pF
Maximum data rate 150 250 kbit/s
One DOUT switching, See Figure 3
CL = 150 pF to 2500 pF
tsk(p) Pulse skew (3) RL = 3 kΩ to 7 kΩ 100 ns
See Figure 5
Slew rate, transition region VCC = 3.3 V, CL = 150 pF to 1000 pF 6 30
SR(tr) V/μs
(see Figure 3) RL = 3 kΩ to 7 kΩ CL = 150 pF to 2500 pF 4 30

(1) Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V + 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
(2) All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
(3) Pulse skew is defined as |tPLH – tPHL| of each channel of the same device.

7.10 Switching Characteristics –– Receiver

over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (1)
PARAMETER TEST CONDITIONS TYP (2) UNIT
tPLH Propagation delay time, low- to high-level output CL = 150 pF, 150 ns
tPHL Propagation delay time, high- to low-level output See Figure 5 150 ns
ten Output enable time CL = 150 pF, RL = 3 kΩ, 200 ns
tdis Output disable time See Figure 6 200 ns
tsk(p) Pulse skew (3) See Figure 5 50 ns

(1) Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
(2) All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
(3) Pulse skew is defined as |tPLH - tPHL| of each channel of the same device.

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7.11 Typical Characteristics

VCC = 3.3 V

6 0
VOH
5 ±1

4 ±2
VOH (V)

VOL (V)
3 ±3

2 ±4

1 ±5
VOL
0 ±6
0 5 10 15 20 25 30 35 0 5 10 15 20 25 30 35
Load Current (mA) C001 Load Current (mA) C001

Figure 1. DOUT VOH vs Load Current Figure 2. DOUT VOL vs Load Current

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8 Parameter Measurement Information

3V
RS-232 Input
Output 0V
Generator
50 W
(see Note B) CL tTHL tTLH
RL (see Note A)
VOH
3V 3V 3V
FORCEOFF Output
−3 V −3 V VOL
SR(tr) 6V
TEST CIRCUIT t THL or tTLH VOLTAGE WAVEFORMS

NOTES: A. CL includes probe and jig capacitance.

B. The pulse generator has the following characteristics: PRR = 250 kbit/s (MAX3243C/I) and 1 Mbit/s (MAX3243FC/I),
ZO = 50 W, 50% duty cycle, tr ≤10 ns, tf ≤10 ns.
Figure 3. Driver Slew Rate
3V
RS-232 Input 1.5 V 1.5 V
Output 0V
Generator
50 W
(see Note B) CL tPHL tPLH
RL (see Note A)
VOH
3V
Output 50% 50%
FORCEOFF
VOL

TEST CIRCUIT VOLTAGE WAVEFORMS

NOTES: A. CL includes probe and jig capacitance.

B. The pulse generator has the following characteristics: PRR = 250 kbit/s (MAX3243C/I) and 1 Mbit/s (MAX3243FC/I),
ZO = 50 W, 50% duty cycle, tr ≤10 ns, tf ≤10 ns.
Figure 4. Driver Pulse Skew
3 V or 0 V
3V
FORCEON Input 1.5 V 1.5 V
−3 V
Output
Generator tPHL tPLH
50 W
(see Note B) CL
3V (see Note A)
VOH
FORCEOFF Output 50% 50%
VOL

TEST CIRCUIT VOLTAGE WAVEFORMS

NOTES: A. CL includes probe and jig capacitance.

B. The pulse generator has the following characteristics: ZO = 50 W, 50% duty cycle, tr ≤10 ns, tf ≤10 ns.
Figure 5. Receiver Propagation Delay Times

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Parameter Measurement Information (continued)

3V
Input
VCC 1.5 V 1.5 V
GND
3 V or 0 V 0V
S1
FORCEON tPHZ tPZH
RL (S1 at GND) (S1 at GND)

3 V or 0 V Output VOH
Output 50%
CL 0.3 V
FORCEOFF (see Note A)
tPLZ tPZL
Generator (S1 at VCC) (S1 at VCC)
50 W
(see Note B)
0.3 V
Output 50%
VOL

TEST CIRCUIT VOLTAGE WAVEFORMS

NOTES: A. CL includes probe and jig capacitance.

B. The pulse generator has the following characteristics: ZO = 50 W, 50% duty cycle, tr ≤10 ns, tf ≤10 ns.
C. tPLZ and tPHZ are the same as tdis.
D. tPZL and tPZH are the same as ten.
Figure 6. Receiver Enable and Disable Times

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Parameter Measurement Information (continued)

3V
2.7 V 2.7 V
Receiver 0V
Input 0V

ROUT −2.7 V −2.7 V

−3 V
Generator
50 W
(see Note B) tinvalid tvalid

VCC
50% VCC 50% VCC
INVALID 0V
Output
Auto- ten
INVALID
powerdown
CL = 30 pF V+ ≈V+
(see Note A) 0.3 V
Supply VCC
FORCEOFF Voltages 0V
0.3 V
DIN DOUT
FORCEON V− ≈V−

TEST CIRCUIT VOLTAGE WAVEFORMS

Valid RS-232 Level, INVALID High

2.7 V
Indeterminate
0.3 V
If Signal Remains Within This Region
0V For More Than 30 ms, INVALID Is Low (see Note C)
−0.3 V
Indeterminate
−2.7 V
Valid RS-232 Level, INVALID High

NOTES: A. CL includes probe and jig capacitance.

B. The pulse generator has the following characteristics: PRR = 5 kbit/s, ZO = 50 W, 50% duty cycle, tr ≤10 ns, tf ≤10 ns.
C. Auto-powerdown disables drivers and reduces supply current to 1 mA.

Figure 7. INVALID Propagation Delay Times and Supply Enabling Time

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9 Detailed Description

9.1 Overview
The MAX3243 device consists of three line drivers, five line receivers, and a dual charge-pump circuit with ±15-
kV ESD (HBM) protection pin to pin (serial- port connection pins, including GND). The device meets the
requirements of TIA/EIA-232-F and provides the electrical interface between an asynchronous communication
controller and the serial-port connector. This combination of drivers and receivers matches that needed for the
typical serial port used in an IBM PC/AT, or compatible. The charge pump and four small external capacitors
allow operation from a single 3-V to 5.5-V supply. In addition, the device includes an always-active noninverting
output (ROUT2B), which allows applications using the ring indicator to transmit data while the device is powered
down. Flexible control options for power management are available. when the serial port is inactive. The auto-
power-down feature functions when FORCEON is low and FORCEOFF is high. During this mode of operation, if
the device does not sense a valid RS-232 signal, the driver outputs are disabled. If FORCEOFF is set low, both
drivers and receivers (except ROUT2B) are shut off, and the supply current is reduced to 1 µA. Disconnecting
the serial port or turning off the peripheral drivers causes the auto-powerdown condition to occur. Auto-
powerdown can be disabled when FORCEON and FORCEOFF are high and should be done when driving a
serial mouse. With auto-powerdown enabled, the device is activated automatically when a valid signal is applied
to any receiver input. The INVALID output is used to notify the user if an RS-232 signal is present at any receiver
input. INVALID is high (valid data) if any receiver input voltage is greater than 2.7 V or less than –2.7 V or has
been between –0.3 V and 0.3 V for less than 30 µs. INVALID is low (invalid data) if all receiver input voltages are
between –0.3 V and 0.3 V for more than 30 µs.

9.2 Functional Block Diagram

14 9
DIN1 DOUT1

13 10
DIN2 DOUT2

12 11
DIN3 DOUT3

22
FORCEOFF
21
Auto-powerdown INVALID
23
FORCEON

19 4
ROUT1 RIN1
20 5 kW
ROUT2B

18 5
ROUT2 RIN2
5 kW

17 6
ROUT3 RIN3
5 kW

16 7
ROUT4 RIN4
5 kW

15 8
ROUT5 RIN5
5 kW

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9.3 Feature Description

9.3.1 Auto-Power-Down
Auto-Power-Down can be used to automatically save power when the receivers are unconnected or connected to
a powered down remote RS232 port. FORCEON being high will override Auto power down and the drivers will
be active. FORCEOFF being low will override FORCEON and will power down all outputs except for ROUT2B
and INVALID.

9.3.2 Charge Pump

The charge pump increases, inverts, and regulates voltage at V+ and V– pins and requires four external
capacitors.

9.3.3 RS232 Driver

Three drivers interface standard logic level to RS232 levels. All DIN inputs must be valid high or low.

9.3.4 RS232 Receiver

Five receivers interface RS232 levels to standard logic levels. An open input will result in a high output on ROUT.
Each RIN input includes an internal standard RS232 load.

9.3.5 ROUT2B Receiver

ROUT2B is an always-active noninverting output of RIN2 input, which allows applications using the ring indicator
to transmit data while the device is powered down.

9.3.6 Invalid Input Detection

The INVALID output goes active low when all RIN inputs are unpowered. The INVALID output goes inactive high
when any RIN input is connected to an active RS232 voltage level.

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9.4 Device Functional Modes

Table 1. Each Driver (1)
INPUTS OUTPUT
VALID RIN DRIVER STATUS
DIN FORCEON FORCEOFF DOUT
RS-232 LEVEL
X X L X Z Powered off
L H H X H Normal operation with
H H H X L auto-powerdown disabled
L L H YES H Normal operation with
H L H YES L auto-powerdown enabled
Power off by
X L H NO Z
auto-powerdown feature

(1) H = high level, L = low level, X = irrelevant, Z = high impedance, YES = any RIN valid, NO = all RIN invalid

Table 2. Each Receiver (1)

INPUTS OUTPUTS
RECEIVER STATUS
RIN FORCEON FORCEOFF ROUT
X X L Z Powered off
L X H H
H X H L Normal operation
Open X H H

(1) H = high level, L = low level, X = irrelevant, Z = high impedance (off), Open = input disconnected or connected driver off

Table 3. INVALID and ROUT2B Outputs (1)

INPUTS OUTPUTS
VALID RIN OUTPUT STATUS
RS-232 RIN2 FORCEON FORCEOFF INVALID ROUT2B
LEVEL
YES L X X H L
Always Active
YES H X X H H
YES OPEN X X H L
Always Active
NO OPEN X X L L

(1) H = high level, L = low level, X = irrelevant, Z = high impedance (off),

OPEN = input disconnected or connected driver off, YES = any RIN valid, NO = all RIN invalid

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10 Application and Implementation

NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.

10.1 Application Information

It is recommended to add capacitors as shown in Figure 8.

10.2 Typical Application

ROUT and DIN connect to UART or general purpose logic lines. RIN and DOUT lines connect to a RS232
connector or cable.
28
C1+
27
1 V+
+ C2+ +
C2 C3(1) +
− 2 −
C2− 26 C1
VCC −
+ CBYPASS
3 25 − = 0.1 mF
V−
− GND
C4
+ 24
C1−
4 23
RIN1 FORCEON
5
RIN2
powerdown

6
Auto-

RS-232 Inputs RIN3 22

FORCEOFF
7
RIN4
8
RIN5
21
INVALID

9 20
DOUT1 ROUT2B

10 19
RS-232 Outputs DOUT2 ROUT1

5 kW

11 18
DOUT3 ROUT2
5 kW
Logic Outputs

12 17
DIN3 ROUT3
5 kW

13 16
Logic Inputs DIN2 ROUT4
5 kW

14 15
DIN1 ROUT5
5 kW

VCC vs CAPACITOR VALUES

(1) C3 can be connected to VCC or GND.
NOTES: A. Resistor values shown are nominal. VCC C1 C2, C3, and C4
B. Nonpolarized ceramic capacitors are acceptable. If polarized tantalum
or electrolytic capacitors are used, they should be connected as 3.3 V ± 0.3 V 0.1 mF 0.1 mF
shown. 5 V ± 0.5 V 0.047 mF 0.33 mF
3 V to 5.5 V 0.1 mF 0.47 mF

Figure 8. Typical Operating Circuit and Capacitor Values

14 Submit Documentation Feedback Copyright © 1999–2015, Texas Instruments Incorporated

Product Folder Links: MAX3243

 MAX3243
www.ti.com SLLS350O – APRIL 1999 – REVISED JANUARY 2015

Typical Application (continued)

10.2.1 Design Requirements
• VCC minimum is 3 V and maximum is 5.5V.
• Maximum recommended bit rate is 250 kbit/s.

10.2.2 Detailed Design Procedure

• All DIN, FORCEOFF and FORCEON inputs must be connected to valid low or high logic levels.
• Select capacitor values based on VCC level for best performance.

10.2.3 Application Curves

VCC= 3.3 V

6
5
4
3
2
1
Voltage (V)

0
±1
±2
±3
±4
±5
±6
±7 DIN
DOUT to RIN
±8
ROUT
±9
0 1 2 3 4 5 6 7
Time (s) C001

Figure 9. Driver to Receiver Loopback Timing Waveform

Copyright © 1999–2015, Texas Instruments Incorporated Submit Documentation Feedback 15

Product Folder Links: MAX3243
MAX3243
SLLS350O – APRIL 1999 – REVISED JANUARY 2015 www.ti.com

11 Power Supply Recommendations

VCC should be between 3 V and 5.5 V. Charge pump capacitors should be chosen using table in Figure 8.

12 Layout

12.1 Layout Guidelines

Keep the external capacitor traces short. This is more important on C1 and C2 nodes that have the fastest rise
and fall times.
In the Layout Example diagram, only critical layout sections are shown. Input and output traces will vary in shape
and size depending on the customer application. FORCEON and /FORCEOFF should be pulled up to VCC or
GND via a pullup resistor, depending on which configuration the user desires upon power-up.

16 Submit Documentation Feedback Copyright © 1999–2015, Texas Instruments Incorporated

Product Folder Links: MAX3243

 MAX3243
www.ti.com SLLS350O – APRIL 1999 – REVISED JANUARY 2015

12.2 Layout Example

C1

1 C2+ C1+ 28
C2
2 C2- V+ 27 Ground
C3
Ground 3 V- VCC 26 VCC
C4
0.1 μF
4 RIN1 GND 25 Ground

5 RIN2 C1- 24

6 RIN3 FORCEON 23

7 RIN4 FORCEOFF 22

8 RIN5 INVALID 21

9 DOUT1 ROUT2B 20

10 DOUT2 ROUT1 19

11 DOUT3 ROUT2 18

12 DIN3 ROUT3 17

13 DIN2 ROUT4 16

14 DIN1 ROUT5 15

Figure 10. Layout Diagram

Copyright © 1999–2015, Texas Instruments Incorporated Submit Documentation Feedback 17

Product Folder Links: MAX3243
MAX3243
SLLS350O – APRIL 1999 – REVISED JANUARY 2015 www.ti.com

13 Device and Documentation Support

13.1 Trademarks
IBM, PC/AT are trademarks of IBM.
All other trademarks are the property of their respective owners.
13.2 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.

13.3 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.

14 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

18 Submit Documentation Feedback Copyright © 1999–2015, Texas Instruments Incorporated

Product Folder Links: MAX3243

 PACKAGE OPTION ADDENDUM

www.ti.com 19-Jan-2015

PACKAGING INFORMATION

Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) (6) (3) (4/5)

MAX3243CDB ACTIVE SSOP DB 28 50 Green (RoHS CU NIPDAU Level-1-260C-UNLIM 0 to 70 MAX3243C

& no Sb/Br)
MAX3243CDBG4 ACTIVE SSOP DB 28 50 Green (RoHS CU NIPDAU Level-1-260C-UNLIM 0 to 70 MAX3243C
& no Sb/Br)
MAX3243CDBR ACTIVE SSOP DB 28 2000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM 0 to 70 MAX3243C
& no Sb/Br)
MAX3243CDBRE4 ACTIVE SSOP DB 28 2000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM 0 to 70 MAX3243C
& no Sb/Br)
MAX3243CDBRG4 ACTIVE SSOP DB 28 2000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM 0 to 70 MAX3243C
& no Sb/Br)
MAX3243CDW ACTIVE SOIC DW 28 20 Green (RoHS CU NIPDAU Level-1-260C-UNLIM 0 to 70 MAX3243C
& no Sb/Br)
MAX3243CDWE4 ACTIVE SOIC DW 28 20 Green (RoHS CU NIPDAU Level-1-260C-UNLIM 0 to 70 MAX3243C
& no Sb/Br)
MAX3243CDWG4 ACTIVE SOIC DW 28 20 Green (RoHS CU NIPDAU Level-1-260C-UNLIM 0 to 70 MAX3243C
& no Sb/Br)
MAX3243CDWR ACTIVE SOIC DW 28 1000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM 0 to 70 MAX3243C
& no Sb/Br)
MAX3243CDWRG4 ACTIVE SOIC DW 28 1000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM 0 to 70 MAX3243C
& no Sb/Br)
MAX3243CPW ACTIVE TSSOP PW 28 50 Green (RoHS CU NIPDAU Level-1-260C-UNLIM 0 to 70 MA3243C
& no Sb/Br)
MAX3243CPWE4 ACTIVE TSSOP PW 28 50 Green (RoHS CU NIPDAU Level-1-260C-UNLIM 0 to 70 MA3243C
& no Sb/Br)
MAX3243CPWG4 ACTIVE TSSOP PW 28 50 Green (RoHS CU NIPDAU Level-1-260C-UNLIM 0 to 70 MA3243C
& no Sb/Br)
MAX3243CPWR ACTIVE TSSOP PW 28 2000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM 0 to 70 MA3243C
& no Sb/Br)
MAX3243CPWRE4 ACTIVE TSSOP PW 28 2000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM 0 to 70 MA3243C
& no Sb/Br)
MAX3243CPWRG4 ACTIVE TSSOP PW 28 2000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM 0 to 70 MA3243C
& no Sb/Br)
MAX3243IDB ACTIVE SSOP DB 28 50 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 MAX3243I
& no Sb/Br)

Addendum-Page 1
 PACKAGE OPTION ADDENDUM

www.ti.com 19-Jan-2015

Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) (6) (3) (4/5)

MAX3243IDBG4 ACTIVE SSOP DB 28 50 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 MAX3243I

& no Sb/Br)
MAX3243IDBR ACTIVE SSOP DB 28 2000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 MAX3243I
& no Sb/Br)
MAX3243IDBRE4 ACTIVE SSOP DB 28 2000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 MAX3243I
& no Sb/Br)
MAX3243IDBRG4 ACTIVE SSOP DB 28 2000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 MAX3243I
& no Sb/Br)
MAX3243IDW ACTIVE SOIC DW 28 20 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 MAX3243I
& no Sb/Br)
MAX3243IDWG4 ACTIVE SOIC DW 28 20 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 MAX3243I
& no Sb/Br)
MAX3243IDWR ACTIVE SOIC DW 28 1000 Green (RoHS CU NIPDAU | CU SN Level-1-260C-UNLIM -40 to 85 MAX3243I
& no Sb/Br)
MAX3243IDWRE4 ACTIVE SOIC DW 28 1000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 MAX3243I
& no Sb/Br)
MAX3243IDWRG4 ACTIVE SOIC DW 28 1000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 MAX3243I
& no Sb/Br)
MAX3243IPW ACTIVE TSSOP PW 28 50 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 MB3243I
& no Sb/Br)
MAX3243IPWG4 ACTIVE TSSOP PW 28 TBD Call TI Call TI -40 to 85

MAX3243IPWR ACTIVE TSSOP PW 28 2000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 MB3243I
& no Sb/Br)
MAX3243IPWRE4 ACTIVE TSSOP PW 28 2000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 MB3243I
& no Sb/Br)
MAX3243IPWRG4 ACTIVE TSSOP PW 28 2000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 MB3243I
& no Sb/Br)

(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

Addendum-Page 2
 PACKAGE OPTION ADDENDUM

www.ti.com 19-Jan-2015

(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)

(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.

(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

OTHER QUALIFIED VERSIONS OF MAX3243 :

• Enhanced Product: MAX3243-EP

NOTE: Qualified Version Definitions:

• Enhanced Product - Supports Defense, Aerospace and Medical Applications

Addendum-Page 3
 PACKAGE MATERIALS INFORMATION

www.ti.com 6-Feb-2015

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
MAX3243CDBR SSOP DB 28 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1
MAX3243CDWR SOIC DW 28 1000 330.0 32.4 11.35 18.67 3.1 16.0 32.0 Q1
MAX3243CPWR TSSOP PW 28 2000 330.0 16.4 6.9 10.2 1.8 12.0 16.0 Q1
MAX3243IDBR SSOP DB 28 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1
MAX3243IDWR SOIC DW 28 1000 330.0 32.4 11.35 18.67 3.1 16.0 32.0 Q1
MAX3243IDWRG4 SOIC DW 28 1000 330.0 32.4 11.35 18.67 3.1 16.0 32.0 Q1
MAX3243IPWR TSSOP PW 28 2000 330.0 16.4 6.9 10.2 1.8 12.0 16.0 Q1
MAX3243IPWR TSSOP PW 28 2000 330.0 16.4 6.9 10.2 1.8 12.0 16.0 Q1

Pack Materials-Page 1
 PACKAGE MATERIALS INFORMATION

www.ti.com 6-Feb-2015

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
MAX3243CDBR SSOP DB 28 2000 367.0 367.0 38.0
MAX3243CDWR SOIC DW 28 1000 367.0 367.0 55.0
MAX3243CPWR TSSOP PW 28 2000 367.0 367.0 38.0
MAX3243IDBR SSOP DB 28 2000 367.0 367.0 38.0
MAX3243IDWR SOIC DW 28 1000 367.0 367.0 55.0
MAX3243IDWRG4 SOIC DW 28 1000 367.0 367.0 55.0
MAX3243IPWR TSSOP PW 28 2000 367.0 367.0 38.0
MAX3243IPWR TSSOP PW 28 2000 367.0 367.0 38.0

Pack Materials-Page 2
 MECHANICAL DATA

MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001

DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE

28 PINS SHOWN

0,38
0,65 0,15 M
0,22
28 15

0,25
0,09
5,60 8,20
5,00 7,40

Gage Plane

1 14 0,25

A 0°–ā8° 0,95
0,55

Seating Plane

2,00 MAX 0,05 MIN 0,10

PINS **
14 16 20 24 28 30 38
DIM

A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90

A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30

4040065 /E 12/01

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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