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Procedia Computer Science 00 (2019) 000–000
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Procedia Computer Science 171 (2020) 1046–1053
Third International Conference on Computing and Network Communications (CoCoNet’19)

Dependence of Conference
Third International Electrical Characteristics
on Computing and Networkof Junctionless
Communications FET on
(CoCoNet’19)
Body Material
Dependence of Electrical Characteristics of Junctionless FET on
Angshumala Talukdara, Apurba Kumar
Body Raibaruah
Material, Kaushik Chandra Deva Sarma *
b c

a,b,c
Department of Instrumentation Engineering, Central Institute of Technology , Kokrajhar, India
Angshumala Talukdara, Apurba Kumar Raibaruahb, Kaushik Chandra Deva Sarma c*
Abstract a,b,c
Department of Instrumentation Engineering, Central Institute of Technology , Kokrajhar, India

This paper presents a study on how body material properties affects the electrical characteristics of a Junctionless field effect
Abstract
transistor (JLFET). The study is performed by simulating a symmetric double gate JLFET on TCAD simulator for the materials-
Silicon (Si), Germanium (Ge), Gallium Arsenide (GaAs) and Gallium Nitride (GaN). Simulations show that the use of
compound
This paper materials
presents (GaAs,
a study GaN)
on howin body
the body
material
of JLFET
properties
results
affects
in better
the electrical
electricalcharacteristics
characteristicsofcompared
a Junctionless
to other
fieldelement
effect
semiconductor
transistor (Si, Ge).
(JLFET). The study is performed by simulating a symmetric double gate JLFET on TCAD simulator for the materials-
Silicon (Si), Germanium (Ge), Gallium Arsenide (GaAs) and Gallium Nitride (GaN). Simulations show that the use of
© 2020 Thematerials
compound Authors. (GaAs,
Published by Elsevier
GaN) B.V.of JLFET results in better electrical characteristics compared to other element
in the body
semiconductor
This is an open (Si, Ge).article under the CC BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
access
Peer-review under responsibility of the scientific committee of the Third International Conference on Computing and Network
© 2020
© 2020 The
The Authors.
CommunicationsAuthors. Published by
Published
(CoCoNet’19) by Elsevier
Elsevier B.V.
B.V.
This is an open access article under the CC BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
This is an open access article under the CC BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Peer-review under responsibility of the scientific committee of the Third International Conference on Computing and Network
Peer-review
Communicationsunder(CoCoNet’19).
responsibility of the scientific committee of the Third International Conference on Computing and Network
Communications (CoCoNet’19)
Keywords:Double gate; Compound Semiconductor; Element Semiconductor; JLFET

1. Introductiongate; Compound Semiconductor; Element Semiconductor; JLFET

Keywords:Double

VLSI design Junctionless Field Effect Transistors (JLFET) is getting popularity in the field of VLSI design due to
1.
theIntroduction
features like simpler fabrication, extremely low short channel effects, near ideal subthreshold slope and optimal
control of gate over the channel potential [1-18]. However it has some major drawbacks. One major drawback is the
VLSI
high design
off state Junctionless
current. Field Effect
This drawback Transistors
can be mitigated(JLFET) is getting
by the use popularity
of a thin channel. in
Butthe fieldchannel
a thin of VLSIwill
design duethe
reduce to
the features like simpler fabrication, extremely low short channel effects, near ideal subthreshold slope and optimal
control of gate over the channel potential [1-18]. However it has some major drawbacks. One major drawback is the
high off state current. This drawback can be mitigated by the use of a thin channel. But a thin channel will reduce the
* Corresponding author. Tel.: +91-9706490533; fax: +913661277105.
E-mail address:kcd.sarma@cit.ac.in

1877-0509© 2020 The

* Corresponding Authors.
author. Published by Elsevier
Tel.: +91-9706490533; fax: B.V.
+913661277105.
ThisE-mail
is an open access article under the CC BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
address:kcd.sarma@cit.ac.in
Peer-review under responsibility of the scientific committee of the Third International Conference on Computing and Network Communications
(CoCoNet’19)
1877-0509© 2020 The Authors. Published by Elsevier B.V.
This is an open access article under the CC BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Peer-review under responsibility of the scientific committee of the Third International Conference on Computing and Network Communications
(CoCoNet’19)

1877-0509 © 2020 The Authors. Published by Elsevier B.V.

This is an open access article under the CC BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Peer-review under responsibility of the scientific committee of the Third International Conference on Computing and Network
Communications (CoCoNet’19).
10.1016/j.procs.2020.04.112
 Angshumala Talukdar et al. / Procedia Computer Science 171 (2020) 1046–1053 1047
2 Angshumala Talukdar, Apurba Kumar Raibaruah, Kaushik Chandra Deva Sarma/ Procedia Computer Science 00 (2019) 000–000

on current also as the channel resistance will be high. A technique for reduction of state current using a dielectric
layer at the centre of the body is proposed by Deva Sarma et al. [19]. The technique is very much effective in
reduction off off-state current without reducing the channel thickness. However, while fabricating , some difficulties
arise in placing an insulator at the centre of the body.
Body material in any MOS based device is highly significant in enhancing the electrical performance by
enhancing carrier mobility as well as blocking large leakage current. The variation of lattice constant causes
enhancement of carrier mobility and increases the carrier velocity[20-21]. This results in higher on current.
Moreover suitable body material can increase the effectiveness of reduction of off state current. For reduction of off
state current keeping the on-state characteristics of JLFET unaffected, a simulation study is needed to identify proper
materials. Therefore a study on electrical performance of a Junctionless field effect transistors for different materials
is presented on this paper. In this study two element semiconductors-Si and Ge and two compound semiconductors
has been selected for simulation.
2. Device Structure And Simulation
The cross-sectional view of a DG JLFET is shown in fig. 1 [22]. The body of the device is considered to be
uniformly doped with donor impurity with doping concentration of 1019/cm3.The source and drain length are
considered as Ls=Ld=5nm. The work function of the gate material is set at Φ M=5.4eV.
COGENDA VisualTCAD 1.8.2 2D device simulator is used for the purpose of all the simulations. The
carrier statistics used for all the simulations is Fermi-Dirac statistics as the materials considered here are crystalline
solids. The source potential is taken as reference potential for all the simulations.

Fig. 1: Cross sectional view of an N-channel symmetric double gate JLT [22]

3. Simulation Results
The transfer characteristics for JLFET with body materials-Si, Ge, GaAs and GaN is shown in fig. 2. The
drain voltage is taken as Vds=0.1V. The channel length is taken as L=20nm, channel thickness is taken as t Si=10nm,
gate oxide thickness is taken as tox=2nm and SiO2(ɛr=3.9) has been considered as the gate oxide material.
Fig. 3, fig. 4, fig. 5 and fig. 6 shows the variation of on-state current with channel length, channel
thickness, gate oxide thickness and dielectric constant. The longer and thinner channel implies higher resistance
causing reduction of on-state current. The thinner gate oxide and lower dielectric constant of gate oxide causes
increase in gate capacitance and as a result the on-state current increases. In compound semiconductors higher
lattice constant results in enhanced mobility causing higher on current flow as seen in the figures.
Fig. 7, fig. 8, fig. 9 and fig. 10 shows the variation of threshold voltage with channel length, channel
thickness, gate oxide thickness and dielectric constant. With increase in channel length DIBL (Drain induced barrier
lowering) reduces. As a result gate controllability increases and more voltage is required to turn the device on.
Therefore threshold voltage rises with channel length as can be seen from fig. 7. When channel thickness is more the
centre is far from the gate. This results in weaker electric field at the centre. Therefore the minimum voltage
required (threshold voltage) is less for thicker channel. Thinner gate oxide and higher value of dielectric constant
causes increase in gate capacitance and reduction in DIBL. It results in larger value of threshold voltage for gate
oxide with less thickness and higher dielectric constant.
Fig. 11, fig. 12, fig. 13 and fig. 14 shows the variation of subthreshold swing with channel length, channel
thickness, gate oxide thickness and dielectric constant. The drain voltage in all cases is considered as Vds=0.1V. The
longer is the channel the lower is the DIBL and subthreshold swing is lower. Thicker channel causes weaker electric
field at the centre causing increase in subthreshold swing. The thinner gate oxide and high dielectric constant gate
1048 Angshumala Talukdar et al. / Procedia Computer Science 171 (2020) 1046–1053
Angshumala Talukdar, Apurba Kumar Raibaruah, Kaushik Chandra Deva Sarma/ Procedia Computer Science 00 (2019) 000–000 3

oxide causes decrease in subthreshold swing as the gate capacitance as well as controllability of the gate increases.
In all cases JLFET with compound semiconductor exhibits better electrical characteristics compared to
JLFET with element semiconductor. Compound semiconductors are direct band gap semiconductors while element
semiconductors are indirect band gap. The generation as well as recombination of electron hole pair is much more
efficient in direct band gap semiconductors. The indirect process is much slower compared to direct process.

Fig. 2: Transfer characteristics Comparison

Fig. 3: On-state current variation with Channel Length

Fig. 4: On-state current variation with Channel Thickness

 Angshumala Talukdar et al. / Procedia Computer Science 171 (2020) 1046–1053 1049
4 Angshumala Talukdar, Apurba Kumar Raibaruah, Kaushik Chandra Deva Sarma/ Procedia Computer Science 00 (2019) 000–000

Fig. 5: On-state current variation with Gate Oxide Thickness

Fig. 6: On-state current variation with Dielectric Constant of Gate Dielectric

Fig. 7: Threshold Voltage variation with Channel Length

1050 Angshumala Talukdar et al. / Procedia Computer Science 171 (2020) 1046–1053
Angshumala Talukdar, Apurba Kumar Raibaruah, Kaushik Chandra Deva Sarma/ Procedia Computer Science 00 (2019) 000–000 5

Fig. 8: Threshold Voltage variation with Channel Thickness

Fig. 9: Threshold Voltage variation with Gate Oxide Thickness

Fig. 10: Threshold Voltage variation with Dielectric Constant of Gate Dielectric
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6 Angshumala Talukdar, Apurba Kumar Raibaruah, Kaushik Chandra Deva Sarma/ Procedia Computer Science 00 (2019) 000–000

Fig. 11: On-state current variation with Channel Length

Fig. 12: Subthreshold Swing variation with Channel Thickness

Fig. 13: Subthreshold Swing variation with Gate Oxide Thickness

1052 Angshumala Talukdar et al. / Procedia Computer Science 171 (2020) 1046–1053
Angshumala Talukdar, Apurba Kumar Raibaruah, Kaushik Chandra Deva Sarma/ Procedia Computer Science 00 (2019) 000–000 7

Fig. 14: Subthreshold Swing variation with Dielectric Constant of Gate Dielectric

4. Conclusion
A comparative simulation study of Junctionless field effect transistor with element semiconductor and
compound semiconductor is presented by comparing the electrical characteristics- transfer characteristics, on state
current, threshold voltage and subthreshold swing The element semiconductors considered for simulation are Si and
Ge and compound semiconductors considered for simulation are GaAs and GaN. The study reveals that compound
semiconductor based JLTFET shows better electrical characteristics compared to element semiconductor based
JLFET. The reason behind this is higher velocity of electrons in compound semiconductors. Higher velocity of
carriers results in higher on current. More over compound semiconductors are mostly direct band while element
semiconductors are mostly indirect band gap. Thus in compound semiconductor the electron hole recombination is
highly efficient which also which is another reason for better electrical characteristics. Although compound
semiconductors are better in terms of electrical performance, however cost will increase with the use of Compound
semiconductors.

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