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Decoder & Encoder

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8 views

Decoder & Encoder

Uploaded by

Kousar Ali
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Bahauddin Zakariya University Multan

Digital Logic & Designs (Lab) Assignment

Submitted By: Areeba Ahmad & Sadia Ismail


Rollno: BSCSE-22-14 & BSCSE-22-32
Topic: Decoder & Encoder
Department: Computer Science
Semester: 5th (Evening)
Submitted To: Mam Saadia Latif
Date: 24-11-2024
Decoders
1. Understanding the Decoder Functionality:

Decoder is a combination logic circuit that takes multiple inputs (n inputs) and
produces multiple outputs (2n outputs). Only one input line is activated at a time.

Truth Table:

2. Setting Up Inputs and Outputs:

The circuit was designed with two inputs (A0 and A1) and four outputs (D0, D1, D2, D3).

3. Using Logic Gates:

The circuit utilized NOT gates and AND gates:


 Two NOT gates were used to invert the inputs A0 and A1.
 Four AND gates were constructed to produce the outputs based on the combinations of
the inputs.

4. Connecting the Gates:

 The first AND gate was connected to A0 and the inverted A1.
 The second AND gate was connected to the inverted A0 and A1.
 The third AND gate was connected to both inputs A0 and A1.
 The fourth AND gate was connected to the inverted A0 and inverted A1.

5. Labeling Outputs:

Each output (D0, D1, D2, D3) was labeled according to the logic conditions defined by
the inputs.

6. Testing the Circuit:


After constructing the circuit, the presenter changed the input values to verify the
outputs, ensuring that the outputs corresponded correctly to the activated input lines.

Result:
 When A0 is OFF and A1 is ON then D2 is ON
 When A0 is ON and A1 is OFF ten D1 is ON

Result:
 When A0 and A1 both are ON then D0 is ON
 When A0 and A1 both are OFF then D3 is ON.
Encoders
2 Understanding encoder concepts
An encoder is a combinational logic circuit that performs the reverse operation of a decoder. It
takes multiple input lines (2^n inputs) and converts them into a smaller number of output lines
(n output lines). Each input line corresponds to a unique binary code on the output lines.
Typically, only one input line is active at any given time, and the encoder produces a binary
representation of the active input.

Truth Table

2. Setting Up Inputs and Outputs for Encoder:

 Inputs: Y3, Y1, Y2 (3 inputs)

 Outputs: O0, O1 (2 outputs)

3. Using Logic Gates:

The encoder takes the three inputs and generates two binary outputs (O0, O1) to represent the
active input.

 Output O1 is derived from Y3 (since it has the highest priority, corresponding to the
most significant bit of the binary output).
 Output O0 is derived from Y1 and Y2 (to determine the least significant bit of the binary
output).
4. Connecting the Gates:

To implement this in logic gates, you can use OR gates as follows:

 O1: Use an OR gate to combine Y3 and Y2. This will produce the most significant bit
(MSB) of the binary code.
 O0: Use an OR gate to combine Y1 and Y2. This will produce the least significant bit
(LSB) of the binary code.

5. Labeling Outputs:

Each output (O0, O1) will be labeled based on the logic conditions defined by the active input.

 O1 (Most Significant Bit) will represent a higher binary value (the first bit in the
output).
 O0 (Least Significant Bit) will represent a lower binary value (the second bit in the
output).

6. Testing the Circuit:

You have 3 inputs (Y3, Y1, Y2) and 2 outputs (O1, O0). The encoder generates a 2-bit binary output
corresponding to the active input line, as described previously

Test Case 1: Y3 = 0, Y1 = 0, Y2 = 0

 Expected Output:
o O1 = 0
o O0 = 0
 Explanation:
o All inputs are OFF, so both O1 and O0 should be OFF, which corresponds to 00.

Test Case 2: Y3 = 0, Y1 = 0, Y2 = 1

 Expected Output:
o O1 = 1
o O0 = 1
 Explanation:
o Y2 is ON, which activates both outputs O1 and O0, resulting in 11.

Test Case 3: Y3 = 0, Y1 = 1, Y2 = 0

 Expected Output:
o O1 = 0
o O0 = 1
 Explanation:
o Y1 is ON, which activates O0, but Y3 is OFF, so O1 remains OFF, resulting in 01.

Result:

The outputs correspond correctly to the input conditions. The logic of the encoder works as expected,
generating a 2-bit binary output based on the active input. Each combination of Y3, Y1, and Y2 produces
the correct values for O1 and O0.

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