Latches and Flip Flops

Semester 1, Week 9
A Reminder About Logic Gates
 All the instructions that direct a computer's
operation exist as a sequence of binary
digits or bits (0s and 1s) – the instructions
and the data are represented this way.
 The logic gates can be arranged in groups
that cause these binary numbers to either
act as adders, subtracters, multipliers,
dividers or logical comparators. Other
groups of gates can act as storage for the
instructions and data. These ‘groups’ are, in
hardware design terms, latches and flip-
flops.
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What is a Latch?
 An asynchronous latch is an electronic
sequential logic circuit used to store
information in an asynchronous
arrangement. (Asynchronous: they have no
Clock input.)

 One latch can store one bit.

 They change output state only in response

to data input.

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What is a Latch? (2)
 Essentially, they hold a bit value and it
remains constant until new inputs force it
to change. A type of single-bit stable
storage.

 (Note: some other latches do have clock

inputs for timing changes.)

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SR (set-reset) Latch
 Basic storage made from gates

S & R both 0 in “resting” state

Have to keep both from 1 at same time
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 S R Latch
 Similar to the previous one – this one is
made from NANDs

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What is a Flip-Flop?
 As with latches, flip-flops are another
example of a circuit employing sequential
logic. A flip-flop can also be called a
bistable gate.

 A type of single-bit storage but not as

stable as a latch.

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What is a Flip-Flop? (2)
 A basic flip-flop has two stable states. The
flip-flop maintains its states indefinitely
until an input pulse (a trigger from the
clock) is received.

 If a trigger is received, the flip-flop outputs

change their states according to defined
rules, and remain in those states until
another trigger is received.

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Flip-Flop Types
 There are several different kinds of
flip-flop circuits, with designators
such as
 R-S,

 J-K

 D, and

 T (a variation on the J-K).

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Example: J-K Flip-Flop

J
D Q
Q
CLK Q’
K Q’

CLK

Qnext = JQ' + K'Q

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What is the Difference Between a Latch
and a Flip-Flop?
 The main difference between a latch and
flip-flop: latches are level-sensitive while
flip-flops are edge-sensitive. Both might
require the use of a clock signal and are
used in sequential logic. (The clock on the
latch is for synchronisation whereas the
clock on the flip-flop may trigger a change
in output.)
 The differences are on the next page but, just so you
know, they can be designed to mimic each other –
certainly the D-types (D-type latch, similar to the D-type
flip-flop.)
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What is the Difference Between a Latch
and a Flip-Flop? (2)
 For a latch, the output tracks the input
when the clock signal is high, so as long as
the clock is logic 1 the output can change if
the input also changes. (Logic 1 + new
data = new output)

 Flip-flops, in comparison, will store the

input only when there is a rising/falling
edge of the clock. (Edge-triggered, so they
may flip on clock pulses.)

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What is a Shift Register?
 Shift registers are a type of sequential logic
circuit, mainly for storage of digital data.
 They are a group of flip-flops connected in
a chain so that the output from one flip-flop
becomes the input of the next flip-flop.
 Most of the registers possess no
characteristic internal sequence of states.
All the flip-flops are driven by a common
clock, and all are set or reset
simultaneously.

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What is a Counter?
 In a the 4-bit counter, edge-triggered
master-slave flip-flops are used. The output
of each flip-flop changes state on the falling
edge (1-to-0 transistion).

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D Latch
 Two inputs:
 the data value to be stored (D)

 the clock signal (C) indicating when to

read and store D

 Two outputs:
 the value of the internal state (Q) and

it's complement

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D Latch (2)

C
Q

_
Q
D

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Standard Symbols – Latches

 The circle at input indicates negation

(inversion).

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Flip-Flop Circuitry
 A ‘flip-flop’ is a combination of gates
that is so-called because its output
can first flip one way and then flop
back the other way.

 Known inputs means you can be sure

the result will be 'flipped'.

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More on Flip-Flops
 Sequential logic is used by (or caused by
(?)) the flip-flop.

 A simple flip-flop has two stable states. The

flip-flop maintains its states indefinitely
until an input pulse called a trigger is
received. If a trigger is received, the flip-
flop outputs change their states according
to defined rules, and remain in those states
until another trigger is received.
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More on Flip-Flops (2)
 Flip-flop circuits are interconnected to form
the logic circuits that comprise
microprocessors (and RAM).

 I.e. the logical and mathematical circuits of

the CPUs Arithmetic and Logic Unit work by
complex combinations of flip-flops and
other logic gates.

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Edge-Triggered D Flip-Flop
1
3
F3
F4
S’
4
1 Q
0 1
CLK F1
F2
1 2 Q’
5
R’
F5
F6
1 6
D 0
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Edge-Triggered D Flip-Flop (2)
1
3
F3
F4
4
S’ 1
1 Q
1 0
CLK F1
F2
1 2 Q’
5
R’ 0
F5
F6
1 6
D 0
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Edge-Triggered D Flip-Flop (3)
1
3
F3
F4
4
S’ 1
1 Q
1 0
CLK F1
F2
1 2 Q’
5
R’ 0
F5
F6
0 6
D 1
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Edge-Triggered D Flip-Flop (4)
0
3
F3
F4
4
S’ 1
1 Q
0 1
CLK F1
F2
1 2 Q’
5
R’ 0
F5
F6
0 6
D 1
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Edge-Triggered D Flip-Flop (5)
0
3
F3
F4
4
S’ 0
1 Q
1 1
CLK F1
F2
0 2 Q’
5
R’ 1
F5
F6
0 6
D 1
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Edge-Triggered D Flip-Flop (6)
0
3
F3
F4
4
S’ 0
1 Q
1 1
CLK F1
F2
0 2 Q’
5
R’ 1
F5
F6
1 6
D 1
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Edge-Triggered D Flip-Flop (7)
1
3
F3
F4
4
S’ 0
1 Q
0 1
CLK F1
F2
1 2 Q’
5
R’ 1
F5
F6
1 6
D 0
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T Flip-Flop

D Q Q
T CLK Q’ Q’
CLK

Qnext  T  Q

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Shift Register

A shift register consists of a chain of bistables connected together

so that data can be transferred (shifted) along the chain from one
end to the other. The diagram shows a 4-bit shift register made
from D-type bistables (Flip-flops).
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Shift Register (2)
 First Clock input: on the first rising edge (Low to
High transition) the logic state at the Serial input
is transferred to A, the output of the first D-type
flip-flop. Before this change the logic state at the
D-input of the second D-type was Low (Logic 0).
This 0 is transferred to B - no change in logic
state.
 When the next Clock pulse arrives, the Serial
input and the D-input of the second D-type are
both at Logic 1. Output A remains at 1 and
output B becomes 1. Each new pulse transfers
the Logic 1 signal to the next stage (the next
flip-flop) of the shift register. The bits in each
flip-flop get ‘shifted over by one’.

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Counter (Ring Counter)

Looking a lot like a shift register – and acting in a few similar ways,
the 4-bit ring counter is also made up of four D-type flip-flops with a
specific input-output arrangement – notably that the last
Complement output is carried back to be the first Serial input.
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Counter
 What are counters counting? They
count events on a digital device. So
they are often associated with
keeping track of the events required
for an instruction to be fetched and
executed, for example, which may
have a number of events – an
instruction is not always executed ‘in
one go’.
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Another Type of Counter
 Another type of counter is the binary
counter.
 These use J-K flip-flops, taking the output
of one cell to the Clock input of the next.
 The J and K inputs of each flip-flop are set
to 1 to produce a shift at each cycle of the
Clock input. For each two shifts of the first
flip-flop a shift is produced in the second
flip-flop and so on down to the fourth flip-
flop. This produces a binary number equal
to the number of cycles of the input Clock
signal.

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Binary Counter
 Also known as a "ripple through"
counter.

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Conclusion
 Gates and inverters, the circuitry
around them, flip-flops and latches
are all very important to processors
and internal memory. They make up
a lot of the circuit structure of the
microprocessor and memory.

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