L10 Logical & Arithmetic ENE334

ENE 334 Microprocessors
Lecture 10:
MCS-51: Logical and Arithmetic
Week #10 : Dejwoot KHAWPARISUTH
http://webstaff.kmutt.ac.th/~dejwoot.kha/
Page 1
Logical: Objectives
Use byte-level AND, OR, XOR and NOT Boolean instructions.
Use bit-level AND, OR, and NOT Boolean

instructions.
Use bit-level set, clear, and data-moving instructions.

Use 8- and 9-bit rotate instructions. Use the A register nibble-swapping instruction.
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ENE 334 MCS-51 Logical & Arithmetic
Logical: Intro
Single point sensing and control implies a need for byte and bit opcodes that operate on data using Boolean operators. All 8051 RAM areas, both data and SFRs, may be manipulated using byte opcodes. Many of the SFRs, and a unique internal RAM area that is bit addressable, may be operated on at the individual bit level. Bit operators are notably efficient when speed of response is needed. Bit operators yield compact program code that enhances program execution speed.
ENE 334 MCS-51 Logical & Arithmetic Page 3 Week #10
Logical: Intro
The two data levels, byte or bit, at which the Boolean instructions operate are shown in the following table:
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Logical: Intro
There are also rotate opcodes that operate only on a byte, or a byte and the Carry flag, to permit limited 8and 9-bit shift-register operations. The following table shows the rotate opcodes:
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Logical: Byte Level
Keep in mind that all such operations are done using each individual bit of the destination and source bytes. These operations, called byte-level Boolean operations because the entire byte is affected, are listed in the following table: Note: that no flags are affected by the byte-level logical operations unless the direct RAM address is the PSW
Logical: Byte Level
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Logical: Byte Level
Many of these byte-level operations use a direct address, which can include the port SFR addresses, as a destination. The normal source of data from a port are the port pin; the normal destination for port data is the port latch. When the destination of a logical operation is the direct address of a port, the latch register, not the pins, is used both as the source for the original data and then the destination for the altered byte of data.
Logical: Byte Level
Any port operation that must first read the source data, logically operate on it, and then write it back to the source (now the destination) must use the latch. Logical operations that use the port as a source, but not as a destination, use the pins of the port as the source of the data.
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Logical: Byte Level
For example, the port 0 latch contains FFh, but the pins are all driving transistor bases and are close to ground level. The logical operation ANL P0,#0Fh which is designed to turn the upper nibble transistors off, reads FFh from the latch, ANDs it with 0Fh to produce 0Fh as a result, and then writes it back to the latch to turn these transistors off.
Logical: Byte Level
Reading the pins produces the result 00h, turning all transistors off, in error. But, the operation ANL A,P0 produces A = 00h by using the port 0 pin data, which is 00h.
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Logical: Byte Level
The following table shows byte-level logical operation examples:
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Logical: Byte Level
Note that instructions that can use the SFR port latches as destinations are ANL, ORL, and XRL.
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Logical: Bit Level
The bit-level Boolean logical opcodes operate on any addressable RAM or SFR bit. The Carry flag (C) in the PSW special-function register is the destination for most
of the opcodes because the flag can be tested and the

program flow changed using instructions covered in Chapter 8.
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Logical: Bit Level
The following table lists the Boolean bit-level operations: Note: that no flags, other than the C flag, are affected, unless the flag is an addressed bit.
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Logical: Bit Level
As is the case for byte-logical operations when addressing ports as destinations, a port bit used as a destination for a logical operation is part of the SFR latch, not the pin. A port bit used as a source only is a pin, not the latch. The bit instructions that can use a SFR latch bit are: CLR, CPL, MOV, and SETB.
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Logical: Bit Level
Bit-level logical operation examples are shown in the following table:
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Logical: Bit Level
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Logical: Rotate and Swap
The ability to rotate data is useful for inspecting bits of a byte without using individual bit opcodes. The A register can be rotated one bit position to the left or right with or without including the C flag in the rotation. If the C flag is not included, then the rotation involves the eight bits of the A register. If the C flag is included, then nine bits are involved in the rotation. Including the C flag enables the programmer to construct rotate operations involving any number of bytes.
The SWAP instruction can be thought of as a rotation of nibbles in the A register. Figure diagrams the rotate and swap operations, which are given in the following table:
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The following table shows examples of rotate and swap
operations.
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Logical: Example
The programs in this section are written using only
opcodes covered to this point in the book. The

challenge is to minimize the number of lines of code.
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Logical: Example 6.1
Double the number in register R2, and put the result in registers R3 (high byte) and R4 (low byte).
Thoughts on the Problem: The largest number in R2 is FFh; the largest result is 1FEh. There are at least three ways to solve this problem: Use the MUL instruction (multiply, covered in Chapter 7), add R2 to itself, or shift R2 left one time. The solution that shifts R2 left is as follows:
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OR the contents of ports 1 and 2; put the result in external RAM location 0100h.
Thoughts on the Problem The ports should be input ports for this problem to make any physical sense; otherwise, we would not know whether to use the pin data or the port SFR latch data.
The solution is as follows:
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Find a number that, when XORed to the A register, results in the number 3Fh in A. Thoughts on the Problem Any number can be in A, so we will work backwards:
3Fh = A XOR N A XOR 3Fh = A XOR A XOR N = N

The solution is as follows:
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Logical: Summary
Boolean logic, rotate, and swap instructions are covered
in this chapter. Byte-level operations involve each

individual bit of a source byte operating on the same bit
position in the destination byte; the results are put in the

destination, while the source is not changed:
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Logical: Summary
ANL destination, source ORL destination, source XRL destination, source CLRA CPLA RRA RLA RRCA RLCA SWAP A
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Logical: Summary
Bit-level operations involve individual bits found in one
area of internal RAM and certain SFRs that may be

addressed both by the assigned direct-byte address and
eight individual bit addresses. The following Boolean

logical operations may be done on each of these addressable bits:
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Logical: Summary
ANL bit ORL bit CLR bit CPL bit SETB bit MOV C, source bit MOV destination bit, C
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Lecture 10: MCS-51: Arithmetic operations
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Arithmetic: Objectives
Use instructions to increment and decrement the
contents of registers and RAM.

Do signed and unsigned addition and subtraction.
Do unsigned multiplication and division.

Do BCD addition.
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Arithmetic: Intro
The 24 arithmetic opcodes are grouped into the
following types:
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Arithmetic: Intro
The addressing modes for the destination and source
are immediate, register, direct, and indirect. The 8051 has four arithmetic flags: the Carry (C),
Auxiliary Carry (AC), Overflow (OV), and Parity (P).
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Arithmetic: Intro
Instructions Affecting Flags
The C, AC, and OV flags are arithmetic flags.

They are set to 1 or cleared to 0 automatically,
depending on the outcomes of the following instructions.

The following instruction set includes all instructions that modify the flags and is not confined to arithmetic instructions:
Arithmetic: Intro
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Arithmetic: Intro
The Parity flag is affected by every instruction executed.
The P flag will be set to a 1 if the number of 1s in the

A register is odd and will be set to 0 if the number of
1s is even.
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Arithmetic: Inc & Dec
Register, direct, and indirect addresses may be INCremented or DECremented. No math flags (C, AC, OV) are affected. The following table lists the increment and decrement mnemonics: Note: that increment and decrement instructions that operate on a port direct address alter the latch for that port.
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The following table shows examples of increment and
decrement arithmetic operations:
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Arithmetic: Addition
The following table lists the addition mnemonics:
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Arithmetic: Addition
Note: that the C flag is set to 1 if there is a carry out of bit position 7; it is cleared to 0 otherwise. The AC flag is set to 1 if there is a carry out of bit position 3, it is cleared otherwise. The OV flag is set to 1 if there is a carry out of bit position 7, but not bit position 6 or if there is a carry out of bit position 6 but not bit position 7, which may be expressed as the logical operation OV = C7 XOR C6
Arithmetic: Unsigned & Signed
Unsigned Addition
Signed Addition
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If positive numbers are added, there is the possibility that the sum will exceed + 127d, as demonstrated in the
following example:
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Ignoring the sign of the result, the magnitude is seen to
be +22d, which would be correct if we had some way of

accounting for the +128d, which, unfortunately, is larger
than a single byte can hold. There is no carry from bit 7

(the Carry flag is 0); there is a carry from bit 6 so the OV flag is 1.
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An example of adding two positive numbers that do not exceed the positive limit is this:
Note: that there are no carries from bits 6 or 7 of the sum; the Carry and OV flags are both 0.
The result of adding two negative numbers together for a sum that does not exceed the negative limit is shown in this example:
Here, there is a carry from bit 7 and the Carry flag is 1; there is a carry from bit 6 and the OV flag is 0. These are the same flags as the case for adding unlike numbers; no corrections are needed for the sum.
When adding two negative numbers whose sum does exceed -128d, we have:
Or, the magnitude can be interpreted as -12d, which is the remainder after a carry out of -128d. In this example, there is a carry from bit position 7, and no carry from bit position 6, so the Carry and the OV flags are set to 1. The magnitude of the sum is correct the sign bit must be changed to a 1.
From these examples the programming actions needed for the C and OV flags are as follows:
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A general rule is that if the OV flag is set, then complement the sign. The OV flag also signals that the sum exceeds the largest positive or negative numbers thought to be needed in the program.
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The following table lists the add with carry mnemonics:
Note: that the C, AC, and OV flags behave exactly as
they do for the ADD commands.

The following table shows examples of ADD and ADDC

multiple-byte signed arithmetic operations:
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Arithmetic: Subtraction
The following table lists the subtract mnemonics:
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Arithmetic: Subtraction
Note: that the C flag is set if a borrow is needed into bit

7 and reset otherwise. The AC flag is set if a borrow is
needed into bit 3 and reset otherwise. The OV flag is

set if there is a borrow into bit 7 and not bit 6 or if there is a borrow into bit 6 and not bit 7. As in the case for
addition, the OV flag is the XOR of the borrows into bit

positions 7 and 6.
Arithmetic: Unsigned
Unsigned Subtraction The following example demonstrates subtraction of a
larger number from a smaller number:
The C flag is set to 1, and the OV flag is set to 0. The
twos complement of the result is 085d.

The reverse of the example yields the following result:
The C flag is set to 0, and the OV flag is set to 0. The
magnitude of the result is in true form.

Arithmetic: Signed
Signed Subtraction
There is a borrow into bit positions 7 and 6; the Carry
flag is set to 1, and the OV flag is cleared.

Arithmetic: Signed
The following example demonstrates using two negative numbers:
There are no borrows into bit positions 6 or 7, so the
OV and Carry flags are cleared to 0.

Arithmetic: Signed
An overflow is possible when subtracting numbers of opposite sign because the situation becomes one of
adding numbers of like signs, as can be demonstrated

in the following example:
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Arithmetic: Signed
Here, there is a borrow into bit position 6 but not into bit
position 7, the OV flag is set to 1, and the Carry flag is

cleared to 0. Because the OV flag is set to 1, the result must be adjusted. In this case, the magnitude can be interpreted as the twos complement of 71d, the remainder after a carry out of 128d from 199d. The
magnitude is correct, and the sign needs to be corrected

to a 1.
Arithmetic: Signed
The following example shows a positive overflow:
There is a borrow from bit position 7, and no borrow from bit position 6; the OV flag and the Carry flag are both set to 1. Again the answer must be adjusted because the OV flag is set to 1. The magnitude can be interpreted as a +011d, the remainder from a carry out of 128d. The sign must be changed to a binary 0 and the OV condition dealt with.
Arithmetic: Signed
The general rule is that if the OV flag is set to 1, then complement the sign bit. The OV flag also signals that the result is greater than -128d or + 127d. Note that for all the examples in this section, it is assumed that the Carry flag = 0 before the SUBB. The Carry flag must be 0 before any SUBB operation that depends on C = 0 is done.
Arithmetic: Signed
The following table lists examples of SUBB multiple-byte signed arithmetic operations:
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Arithmetic: Signed
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Arithmetic: Mul & Div
The 8051 has the capability to perform 8-bit integer multiplication and division using the A and B registers. Multiplication and division treat the numbers in registers A and B as unsigned. The programmer must devise ways to handle signed numbers.
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Arithmetic: Multiplication
Multiplication operations use registers A and B as both source and destination addresses for the operation. The unsigned number in register A is multiplied by the unsigned number in register B, as indicated in the following table:
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The OV flag will be set if A x B > FFh. Setting the OV flag does not mean that an error has occurred. Rather,
it signals that the number is larger than 8 bits, and the

programmer needs to inspect register B for the high-
order byte of the multiplication operation. The Carry flag

is always cleared to 0.
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The following list gives examples of MUL multiple-byte arithmetic operations:
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Arithmetic: Division
Division operations use registers A and B as both source and destination addresses for the operation. The unsigned
number in register A is divided by the unsigned number in

register B, as indicated in the following table:
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The OV flag is cleared to 0 unless B holds 00h before the DIV. Then the OV flag is set to 1 to show division by 0. The contents of A and B, when division by 0 is
attempted, are undefined. The Carry flag is always

reset.
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Division always results in integer quotients and remainders, as shown in the following example:
When done in hex:
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The following table lists examples of DIV multiple-byte arithmetic operations:
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Arithmetic: Decimal
The opcode that adjusts the result of BCD addition is the decimal adjust A for addition (DA A) command, as shown in the following table:
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Arithmetic: Decimal
The C flag is set to 1 if the adjusted number exceeds 99BCD and set to 0 otherwise. The DA A instruction makes use of the AC flag and the binary sums of the individual binary nibbles to adjust the answer to BCD. The AC flag has no other use to the programmer and no instructions other than a MOV or a direct bit operation to the PSW affect the AC flag.
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Arithmetic: Decimal
The following table gives examples of BCD multiple-byte arithmetic operations:
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Arithmetic: Decimal
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Arithmetic: Example 7.1
Add the unsigned numbers found in internal RAM

locations 25h, 26h, and 27h together and put the result in
RAM locations 31h (MSB) and 30h (LSB).

Thoughts on the Problem The largest number possible is FFh + FFh + FFh = 02FDh so that 2 bytes will hold the largest possible number. The MSB will be set to 0 and any carry bit added to it for each byte addition.
To solve this problem, use an ADD instruction for each

addition and an ADDC to the MSB for each carry that might be generated. The first ADD will adjust any Carry flag that exists before the program starts.
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The complete program is shown in the following table:
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Repeat problem 7.1 using BCD numbers. Thoughts on the Problem The numbers in the RAM locations must be in BCD before the problem begins. The largest number possible is 99d + 99d = 198d + 99d = 297d, so that up to two carries can be added to the MSB. The solution to this problem is identical to that for unsigned numbers, except a DA A must be added after each ADD instruction. If more bytes were added so that the MSB could exceed 09d, then a DA A would also be necessary after the ADDC opcodes.
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Multiply the unsigned number in register R3 by the
unsigned number on port 2 and put the result in external

RAM locations 10h (MSB) and 11h (LSB). Thoughts on the Problem The MUL instruction uses the A and B registers; the problem consists of MOVes to A and B followed by MOVes to the external RAM.

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Arithmetic: Summary
The 8051 can perform all four arithmetic operations: addition, subtraction, multiplication, and division. Signed and unsigned numbers may be used in addition and subtraction; an OV flag is provided to signal programmer errors in estimating signed number magnitudes needed and to adjust signed number results. Multiplication and division use unsigned numbers. BCD arithmetic may be done using the DA A and ADD or ADDC instructions.
Arithmetic: Summary
The following table lists the arithmetic mnemonics:
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Hw:
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ENE 334 Microprocessors

Week #10 : Dejwoot KHAWPARISUTH

Use byte-level AND, OR, XOR and NOT Boolean instructions.

Use bit-level AND, OR, and NOT Boolean

Use bit-level set, clear, and data-moving instructions.

ENE 334 MCS-51 Logical & Arithmetic

ENE 334 MCS-51 Logical & Arithmetic

ENE 334 MCS-51 Logical & Arithmetic

Logical: Byte Level

Logical: Byte Level

ENE 334 MCS-51 Logical & Arithmetic

Logical: Byte Level

Logical: Byte Level

ENE 334 MCS-51 Logical & Arithmetic

Logical: Byte Level

Logical: Byte Level

ENE 334 MCS-51 Logical & Arithmetic

Logical: Byte Level

The following table shows byte-level logical operation examples:

ENE 334 MCS-51 Logical & Arithmetic

Logical: Byte Level

ENE 334 MCS-51 Logical & Arithmetic

Logical: Bit Level

of the opcodes because the flag can be tested and the

ENE 334 MCS-51 Logical & Arithmetic

Logical: Bit Level

ENE 334 MCS-51 Logical & Arithmetic

Logical: Bit Level

ENE 334 MCS-51 Logical & Arithmetic

Logical: Bit Level

Bit-level logical operation examples are shown in the following table:

ENE 334 MCS-51 Logical & Arithmetic

Logical: Bit Level

ENE 334 MCS-51 Logical & Arithmetic

Logical: Rotate and Swap

Logical: Rotate and Swap

ENE 334 MCS-51 Logical & Arithmetic

Logical: Rotate and Swap

ENE 334 MCS-51 Logical & Arithmetic

Logical: Rotate and Swap

The following table shows examples of rotate and swap

ENE 334 MCS-51 Logical & Arithmetic

Logical: Rotate and Swap

ENE 334 MCS-51 Logical & Arithmetic

The programs in this section are written using only

opcodes covered to this point in the book. The

ENE 334 MCS-51 Logical & Arithmetic

Logical: Example 6.1

Logical: Example 6.1

ENE 334 MCS-51 Logical & Arithmetic

Logical: Example 6.2

Logical: Example 6.2

ENE 334 MCS-51 Logical & Arithmetic

Logical: Example 6.3

3Fh = A XOR N A XOR 3Fh = A XOR A XOR N = N

Logical: Example 6.3

ENE 334 MCS-51 Logical & Arithmetic

Boolean logic, rotate, and swap instructions are covered

in this chapter. Byte-level operations involve each

position in the destination byte; the results are put in the