MICROPROCESSOR AND Course code: AV242

MICROCONTROLLER-Lab3 Credits:2
30th January 2024
 DELAYS
Delay = No. of T-States / Frequency
If there is 1 byte instruction we will require minimum 4T states.
If there is 2 byte instruction we will require minimum 7T states.
If there is 3 byte instruction we will require minimum 10T states.
For example a “MVI” instruction uses 7 T-States. Therefore, if the Microprocessor is running
at 2 MHz, the instruction would require 3.5 µSeconds to complete.
Consider a delay loop:
MVI C, FFH 7 T-States
LOOP DCR C 4 T-States
JNZ LOOP 10 T-States
The first instruction initializes the loop counter and is executed only once requiring only
7 T-States. The following two instructions form a loop that requires 14 T-States to execute
and is repeated 255 times until C becomes 0.
NESTED LOOPS FOR DELAY
 STACK
● The stack is a reserved area of the memory in RAM where we can store
temporary information. Interestingly, the stack is a shared resource as it can be
shared by the microprocessor and the programmer. The programmer can use the
stack to store data. And the microprocessor uses the stack to execute subroutines.

● The 8085 has a 16-bit register known as the ‘Stack Pointer’. This register’s
function is to hold the memory address of the stack. This control is given to the
programmer. The programmer can decide the starting address of the stack by
loading the address into the stack pointer register at the beginning of a program.

● The stack works on the principle of Last In First Out (LIFO). The memory location
of the most recent data entry on the stack is known as the Stack Top.
STACK
● The stack normally grows backwards into memory. – In other words, the
programmer defines the bottom of the stack and the stack grows up into
reducing address range.
● Normally we place the bottom of the stack at the end of memory to keep it
as far away from user programs as possible.
STACK
● The stack is defined by setting the 16 bit SP (Stack Pointer) register.

LXI SP, FFFFH

● The Size of the stack is limited only by the available memory.

● PUSH and POP are the two instructions used to manipulate the data in
the stack.
PUSH and POP
● Information is saved on the stack by PUSHing it on and it is retrieved from
the stack by POPing it off.

● The 8085 provides two instructions: PUSH and POP for storing
information on the stack and retrieving it back.

● Both PUSH and POP work with register pairs ONLY.

PUSH
PUSH B (1 Byte Instruction).
● Decrement SP
● Copy the contents of register B to the memory location pointed to by SP
● Decrement SP
● Copy the contents of register C to the memory location pointed to by SP
● During pushing, the stack operates in a “decrement then store” style. The
stack pointer is decremented first, then the information is placed on the
stack.
POP
POP D (1 Byte Instruction).
● Copy the contents of the memory location pointed to by the SP to register
E
● Increment SP
● Copy the contents of the memory location pointed to by the SP to register
D
● Increment SP
● During poping, the stack operates in a “use then increment” style. The
information is retrieved from the top of the the stack and then the pointer is
incremented
The PSW Register Pair
● The 8085 recognizes one additional register pair called the PSW (Program
Status Word).
● This register pair is made up of the Accumulator and the Flags registers.
● It is possible to push the PSW onto the stack, do whatever operations are
needed, then POP it off of the stack.
● The result is that the contents of the Accumulator and the status of the
Flags are returned to what they were before the operations were
executed.
PUSH PSW Register Pair
PUSH PSW (1 Byte Instruction)
● Decrement SP
● Copy the contents of register A to the memory location pointed to by SP
● Decrement SP
● Copy the contents of Flag register to the memory location pointed to by
SP
POP PSW Register Pair
POP PSW (1 Byte Instruction)
● Copy the contents of the memory location pointed to by the SP to Flag
register
● Increment SP
● Copy the contents of the memory location pointed to by the SP to register
A
● Increment SP
SUBROUTINES
● A subroutine is a group of instructions that will be used repeatedly in
different locations of the program.
● Rather than repeat the same instructions several times, they can be
grouped into a subroutine that is called from the different locations.
● In Assembly language, a subroutine can exist anywhere in the code.
● However, it is customary to place subroutines separately from the main
program.
● The 8085 has two instructions for dealing with subroutines.
● The CALL instruction is used to redirect program execution to the
subroutine.
● The RET instruction is used to return the execution to the calling routine.
CALL INSTRUCTION
CALL 4000H (3 byte instruction)
CALL INSTRUCTION
CALL 4000H (3 byte instruction)
● When CALL instruction is fetched, the MP knows that the next two
Memory location contains 16 bit subroutine address in the memory.
● MP Reads the subroutine address from the next two memory location and
stores the higher order 8bit of the address in the W register and stores the
lower order 8bit of the address in the Z register.
● Push the address of the instruction immediately following the CALL onto
the stack [Return address].
● Loads the program counter with the 16-bit address supplied with the CALL
instruction from WZ register.
RET INSTRUCTION
RET 4000H (1 byte instruction)
● Retrieve the return address from the top of the stack.
● Load the program counter with the return address.
Programs for stack and
subroutines
1. Exchanging a 16 bit data between register pairs DE and HL using stack
memory.
HL - 1234
DE - 5678
Program

LXI H,1234
LXI D, 5678
LXI SP, FFFF
PUSH H
PUSH D
POP H
POP D
 Programs for stack and
subroutines
2. Write a program that calculates the sum of 4 numbers from 4 registers. Let
the addition operation be considered as a subroutine program.

A - 01H
B - 02H
C - 03H
D - 04H
Program
LXI SP, FFFF
MVI A, 01H
MVI B, 02H
MVI C, 03H
MVI D, 04H
CALL ADD
HLT
ADD: ADD B
ADD C
ADD D
RET
 Programs for stack and
subroutines
3. Write a subroutine program to add two numbers, call a delay, and subtract the two numbers using subroutine
programming.
 Program

MVI A, 05H
MVI B, 03H
ADD B
MOV C, A
CALL DELAY
SUB B
MOV D, A
HLT

DELAY: MVI D, FFH

DELAY_LOOP:DCR D
JNZ
DELAY_LOOP
RET
INTERRUPTS
Interrupt is a process where an external device can get the attention of
the microprocessor.
The process starts from the I/O device and is asynchronous.
Interrupts can be classified into two types:
Maskable (can be delayed)
Non-Maskable (can not be delayed)
Interrupts can also be classified into:
Vectored (the address of the service routine is hard-wired –interrupt
address is known to the processor)
Non-vectored (the address of the service routine needs to be supplied
externally-interrupt address not known to processor)
When the Microprocessor receives an interrupt signal, it suspends the
currently executing program and jumps to an Interrupt Service Routine
(ISR) to respond to the incoming interrupt.
 THE 8085 INTERRUPTS
The maskable interrupt process in the 8085 is controlled by a single
flip flop inside the microprocessor. This Interrupt Enable flip flop is
controlled using the two instructions “EI” and “DI”
The 8085 has a single Non-Maskable interrupt. – The non-maskable
interrupt is not affected by the value of the Interrupt Enable flip flop
The 8085 has 5 interrupt inputs.
– The INTR input-(The INTR input is the only non-vectored interrupt)
• INTR is maskable using the EI/DI instruction pair.
RST 5.5, RST 6.5, RST 7.5 are all automatically vectored.
• RST 5.5, RST 6.5, and RST 7.5 are all maskable.
TRAP is the only non-maskable interrupt in the 8085
• TRAP is also automatically vectored
8085 INTERRUPTS
Hardware Interrupts When microprocessors receive interrupt
signals through pins (hardware) of microprocessor, they are known
as Hardware Interrupts. There are 5 Hardware Interrupts in 8085
microprocessor. They are – INTR, RST 7.5, RST 6.5, RST 5.5,
TRAP
Software Interrupts are those which are inserted in between the
program which means these are mnemonics of microprocessor.
There are 8 software interrupts in 8085 microprocessor. They are –
RST 0, RST 1, RST 2, RST 3, RST 4, RST 5, RST 6, RST 7.

Priority of Interrupts – When microprocessor receives multiple interrupt requests

simultaneously, it will execute the interrupt service request (ISR) according to the
priority of the interrupts.
Instruction for Interrupts –
Enable Interrupt (EI) – The interrupt enable flip-flop is set and all interrupts are enabled
following the execution of next instruction followed by EI. No flags are affected. After a system reset,
the interrupt enable flip-flop is reset, thus disabling the interrupts. This instruction is necessary to enable
the interrupts again (except TRAP).
Disable Interrupt (DI) – This instruction is used to reset the value of enable flip-flop hence disabling
all the interrupts. No flags are affected by this instruction.
Set Interrupt Mask (SIM) – It is used to implement the hardware interrupts (RST 7.5, RST 6.5, RST
5.5) by setting various bits to form masks or generate output data via the Serial Output Data (SOD)
line. First the required value is loaded in accumulator then SIM will take the bit pattern from it.
Read Interrupt Mask (RIM) – This instruction is used to read the status of the hardware
interrupts (RST 7.5, RST 6.5, RST 5.5) by loading into the A register a byte which defines the
condition of the mask bits for the interrupts. It also reads the condition of SID (Serial Input Data)
bit on the microprocessor.