MOSFET Lectures

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Electronic Devices and Circuits

MOS Field-Effect Transistors (MOSFETs)


Lecture 3
MOSFET in Amplifier Design

Prepared By: Muhammad Abdullah


muhammad.abdullah@nu.edu.pk , uetian.09@gmail.com

National University FAST (CFD Campus)

My YouTube Channel:
https://www.youtube.com/@BlueFish506

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Applying MOSFET in Amplifier Design

Key Concept: A MOSFET in saturation operates as a voltage-controlled current


source. The gate-to-source voltage ( 𝑣𝐺𝑆 ) controls the drain current (𝑖𝐷 ), enabling
near-linear amplification despite the MOSFET;s nonlinear behavior.

Obtaining a Voltage Amplifier


Objective: Convert the MOSFET’s transconductance property into a voltage
amplifier.

Figure 1: (a) Simple MOSFET amplifier with input 𝒗𝑮𝑺 and output 𝒗𝑫𝑺 (b) Voltage transfer
characteristic (VTC) of the amplifier in

Output Voltage (𝑣𝐷𝑆 ) is defined as;


𝑣𝐷𝑆 = 𝑉𝐷𝐷 − 𝑖𝐷 𝑅𝐷
In the amplifier circuit of Fig 1(a) the output voltage is taken between the drain and
ground, rather than simply across 𝑅𝐷 . This is done because of the need to maintain
a ground reference throughout the circuit.
Drain current in saturation is given as;

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1 1
𝑖𝐷 = 𝑘𝑛 (𝑣𝑂𝑉 )2 = 𝑘𝑛 (𝑣𝐺𝑆 − 𝑉𝑡 )2
2 2
Now output voltage can be written as;
1
𝑣𝐷𝑆 = 𝑉𝐷𝐷 − 𝑘𝑛 𝑅𝐷 (𝑣𝐺𝑆 − 𝑉𝑡 )2 Eq.(1)
2
This is obviously a nonlinear relationship. Nevertheless, linear (or almost-linear)
amplification can be obtained by using the technique of biasing the MOSFET.
The boundary between the saturation and the triode regions of operation can be
obtained by substituting, 𝑣𝐺𝑆 = 𝑉𝐺𝑆 |B and 𝑣𝐷𝑆 = 𝑉𝐷𝑆 |B = 𝑉𝐺𝑆 |B − 𝑉𝑡

2𝑘𝑛 𝑅𝐷 𝑉𝐷𝐷 + 1
𝑉𝐺𝑆 |𝐵 = 𝑉𝑡 + √ −1
𝑘𝑛 𝑅𝐷

Point B can be alternatively characterized by the overdrive voltage


√2𝑘𝑛 𝑅𝐷 𝑉𝐷𝐷 + 1 − 1
𝑉𝑂𝑉 |B ≡ 𝑉𝐺𝑆 |B − 𝑉𝑡 =
𝑘𝑛 𝑅𝐷
and
𝑉𝐷𝑆 |B = 𝑉𝑂𝑉 |B

Example 1

Consider the amplifier of Figure 1 with 𝑉𝐷𝐷 = 1.8 V, 𝑅𝐷 = 17.5kΩ, and with a
MOSFET specified to have 𝑉𝑡 = 0.4 V, 𝑘𝑛 = 4 mA/V 2 , and 𝜆 = 0. Determine the
coordinates of the end points of the active-region segment of the VTC. Also,
determine 𝑉𝐷𝑆 |𝐶 assuming 𝑉𝐺𝑆 |𝐶 = 𝑉𝐷𝐷 .
Solution:
At point A:
Coordinates of point A: 𝑣𝐺𝑆 = 𝑉𝑡 = 0.4 𝑉 and 𝑣𝐷𝑆 = 𝑉𝐷𝐷 = 1.8 𝑉
At point B:
To determine the coordinates of point B

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√2𝑘𝑛 𝑅𝐷 𝑉𝐷𝐷 + 1 − 1 √2 × 4𝑚 × 17.5 × 1.8 + 1 − 1
𝑉𝑂𝑉 |B = = = 0.213 𝑉
𝑘𝑛 𝑅𝐷 4𝑚 × 17.5𝑘
𝑉𝑂𝑉 |B = 𝑉𝐺𝑆 |B − 𝑉𝑡
𝑉𝐺𝑆 |B = 𝑉𝑡 + 𝑉𝑂𝑉 |B = 0.4 + 0.213 = 0.613 V
𝑉𝐷𝑆 |B = 𝑉𝑂𝑉 |B = 0.213 V
Thus, coordinates of B are 0.613 V and 0.213 V.
At point C:
Assuming 𝑣𝐷𝑆|𝐶 is very small
𝑉𝐷𝐷 − 𝑣𝐷𝑆|𝐶 𝑉𝐷𝐷 1.8
𝑖𝐷 = ≅ = = 0.1 mA
𝑅𝐷 𝑅𝐷 17.5𝑘
At point C, the MOSFET is operating in the triode region, thus;
1
𝑖𝐷 = 𝑘𝑛 [(𝑣𝐺𝑆 |C − 𝑉𝑡 )𝑣𝐷𝑆|𝐶 − 𝑣 2 𝐷𝑆|𝐶 ]
2
𝑖𝐷 ≅ 𝑘𝑛 (𝑣𝐺𝑆 |C − 𝑉𝑡 )𝑣𝐷𝑆 |C = 4𝑚(1.8 − 0.4)𝑣𝐷𝑆|𝐶 = 5.6𝑚 𝑣𝐷𝑆|𝐶
𝑖𝐷 0.1m
𝑣𝐷𝑆|𝐶 = = = 0.018 𝑉 = 18 𝑚𝑉
5.6𝑚 5.6𝑚

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Biasing the MOSFET to Obtain Linear Amplification

Figure 2: Biasing the MOSFET amplifier at a point Q located on the segment AB of the VTC

Observe that the coordinates of Q are the DC voltages 𝑉𝐺𝑆 and 𝑉𝐷𝑆 , which are related
by;
1
𝑉𝐷𝑆 = 𝑉𝐷𝐷 − 𝑘𝑛 𝑅𝐷 (𝑉𝐺𝑆 − 𝑉𝑡 )2
2
Point Q is known as the bias point or the dc operating point.

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Small-Signal Voltage Gain:

(a)

(b)

Figure 3: (a) MOSFET amplifier (b) MOSFET Operation at Q-point

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Total instantaneous value of 𝑣𝐺𝑆 is;
𝑣𝐺𝑆 (𝑡) = 𝑉𝐺𝑆 + 𝑣𝑔𝑠 (𝑡)
If the input signal 𝑣𝑔𝑠 is kept small, the corresponding signal at the output 𝑣𝑑𝑠 will
be nearly proportional to 𝑣𝑔𝑠 with the constant of proportionality being the slope of
the almost-linear segment of the VTC around Q. This is the voltage gain of the
amplifier, and its value can be determined by evaluating the slope of the tangent to
the VTC at the bias point Q. Using Eq. (1) we obtain
𝑑𝑣𝐷𝑆
𝐴𝑣 ≡ |
𝑑𝑣𝐺𝑆 𝑣
𝐺𝑆 =𝑉𝐺𝑆

𝐴𝑣 = −𝑘𝑛 (𝑉𝐺𝑆 − 𝑉𝑡 )𝑅𝐷 = −𝑘𝑛 𝑉𝑂𝑉 𝑅𝐷


DC drain current in saturation is given as;
1 2𝐼𝐷
2
𝐼𝐷 = 𝑘𝑛 𝑉𝑂𝑉  𝑘𝑛 𝑉𝑂𝑉 =
2 𝑉𝑂𝑉
Now 𝐴𝑣 expression can be written as
2𝐼𝐷 𝑅𝐷 𝐼𝐷 𝑅𝐷
𝐴𝑣 = − =−
𝑉𝑂𝑉 𝑉𝑂𝑉 /2
Upper limit on the magnitude of voltage gain achievable from this amplifier is;
𝑉𝐷𝐷
|𝐴𝑣max | =
𝑉𝑂𝑉 /2

Example 2

Consider the amplifier circuit shown in Figure 2. The transistor is specified to have
𝑉𝑡 = 0.4 V, 𝑘𝑛′ = 0.4 mA/V 2 , 𝑊/𝐿 = 10, and 𝜆 = 0. Also, let 𝑉𝐷𝐷 = 1.8 V, 𝑅𝐷 =
17.5kΩ, and 𝑉𝐺𝑆 = 0.6 V.

a. For 𝑣𝑔𝑠 = 0 (and hence 𝑣𝑑𝑠 = 0 ), find 𝑉𝑂𝑉 , 𝐼𝐷 , 𝑉𝐷𝑆 , and 𝐴𝑣 .


b. What is the maximum symmetrical signal swing allowed at the drain? Hence
find the maximum allowable amplitude of a sinusoidal 𝑣𝑔𝑠 .

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Solution:

Part (a)
𝑘𝑛 = 𝑘𝑛′ (𝑊/𝐿) = 0.4𝑚 × 10 = 4 𝑚A/V 2
𝑉𝑂𝑉 = 𝑉𝐺𝑆 − 𝑉𝑡 = 0.6 − 0.4 = 0.2 V
1 1
𝐼𝐷 = 𝑘𝑛 (𝑣𝑂𝑉 )2 = × 4𝑚 × 0.22 = 0.08 mA
2 2
𝑉𝐷𝑆 = 𝑉𝐷𝐷 − 𝐼𝐷 𝑅𝐷 = 1.8 − 0.08𝑚 × 17.5𝑘 = 0.4 V
As 𝑉𝐷𝑆 is greater than 𝑉𝑂𝑉 , so the transistor is indeed operating in saturation.
The voltage gain is calculated as;
𝐴𝑣 = −𝑘𝑛 𝑉𝑂𝑉 𝑅𝐷 = −4𝑚 × 0.2 × 17.5𝑘 = −14 𝑉/𝑉

Part (b)
Since 𝑉𝑂𝑉 = 0.2 V, thus the maximum symmetrical signal swing allowable at the
drain is ±0.2 V.
𝑣ˆ𝑑𝑠 0.2 V
𝑣ˆ𝑔𝑠 = = = 14.2mV
|𝐴𝑣 | 14

Example 3

For the amplifier circuit studied in Example 2, create two alternative designs, each
providing a voltage gain of -10 by;

a. Changing 𝑅𝐷 while keeping 𝑉𝑂𝑉 constant


b. Changing 𝑉𝑂𝑉 while keeping 𝑅𝐷 constant

For each design, specify 𝑉𝐺𝑆 , 𝐼𝐷 , 𝑅𝐷 , and 𝑉𝐷𝑆 .

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Solution:

Part (a)
From Example 2 solution, we can write;
𝑉𝑂𝑉 = 0.2 V ; 𝑉𝐺𝑆 = 0.6 V ; 𝐼𝐷 = 0.8 mA
Now voltage gain is written as;
𝐴𝑣 = −𝑘𝑛 𝑉𝑂𝑉 𝑅𝐷
𝐴𝑣 −10
𝑅𝐷 = = = 12.5kΩ
−𝑘𝑛 𝑉𝑂𝑉 −4𝑚 × 0.2
𝑉𝐷𝑆 = 𝑉𝐷𝐷 − 𝐼𝐷 𝑅𝐷 = 1.8 − 0.08𝑚 × 12.5𝑘 = 0.8 V

Part (b)
From Example 2, we can write: 𝑅𝐷 = 17.5𝑘Ω
𝐴𝑣 = −𝑘𝑛 𝑉𝑂𝑉 𝑅𝐷
𝐴𝑣 −10
𝑉𝑂𝑉 = = = 0.14 𝑉
−𝑘𝑛 𝑅𝐷 −4 × 17.5𝑘
𝑉𝑂𝑉 = 𝑉𝐺𝑆 − 𝑉𝑡
𝑉𝐺𝑆 = 𝑉𝑡 + 𝑉𝑂𝑉 = 0.4 + 0.14 = 0.54 V
1 1
𝐼𝐷 = 𝑘𝑛 (𝑣𝑂𝑉 )2 = × 4𝑚 × 0.142 = 0.04 mA
2 2
𝑉𝐷𝑆 = 𝑉𝐷𝐷 − 𝐼𝐷 𝑅𝐷 = 1.8 − 0.04𝑚 × 17.5𝑘 = 1.1 V

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