Computer Evolution

and Performance

Julius Bancud
 ENIAC - background
• The First Generation: Vacuum Tube
• ENIAC: Electronic Numerical Integrator And Computer
• The Army’s Ballistics Research Laboratory (BRL), an
agency responsible for developing range and trajectory
tables for new weapons, was having difficulty supplying
these tables accurately and within a reasonable time frame.
• The BRL employed more than 200 people who, using
desktop calculators, solved the necessary ballistics
equations.
 ENIAC
• John Mauchly, a professor of electrical engineering at
the University of Pennsylvania, and John Eckert, one
of his graduate students, proposed to build a general-
purpose computer using vacuum tubes for the BRL’s
application. In 1943, the Army accepted this proposal,
and work began on the ENIAC. The resulting machine
was enormous, weighing 30 tons, occupying 1500
square feet of floor space, and containing more than
18,000 vacuum tubes. When operating, it consumed 140
kilowatts of power. It was also substantially faster than
any electromechanical computer, capable of 5000
additions per second.
 ENIAC
• The ENIAC was a decimal rather than a binary machine.
That is, numbers were represented in decimal form, and
arithmetic was performed in the decimal system.
• Its memory consisted of 20 “accumulators,” each capable
of holding a 10-digit decimal number. A ring of 10
vacuum tubes represented each digit. At any time, only
one vacuum tube was in the ON state, representing one of
the 10 digits. The major drawback of the ENIAC was that
it had to be programmed manually by setting switches
and plugging and unplugging cables.
 ENIAC

• The ENIAC was completed in 1946, too late to be

used in the war effort. Instead, its first task was to
perform a series of complex calculations that were
used to help determine the feasibility of the
hydrogen bomb. The use of the ENIAC for a
purpose other than that for which it was built
demonstrated its general-purpose nature. The
ENIAC continued to operate under BRL
management until 1955, when it was disassembled.
 Von Neumann Machine/Turing

• This idea, known as the stored-program concept, is

usually attributed to the ENIAC designers, most
notably the mathematician John von Neumann,
who was a consultant on the ENIAC project. Alan
Turing developed the idea at about the same time.
The first publication of the idea was in a 1945
proposal by von Neumann for a new computer, the
EDVAC (Electronic Discrete Variable Computer).
 Von Neumann Machine/Turing

• In 1946, von Neumann and his colleagues began

the design of a new stored program computer,
referred to as the IAS computer, at the Princeton
Institute for Advanced Studies. The IAS computer,
although not completed until 1952, is the prototype
of all subsequent general-purpose computers.
Structure of von Neumann machine
 The general structure of the IAS
computer
• A main memory, which stores both data and
instructions.
• An arithmetic and logic unit (ALU) capable of
operating on binary data
• A control unit, which interprets the instructions in
memory and causes them to be executed
 The general structure of the IAS
computer
• Input and output (I/O) equipment operated by the
control unit
• **the term instruction refers to a machine
instruction that is directly interpreted and executed
by the processor, in contrast to an instruction in a
high-level language, such as Ada or C++, which
must first be compiled into a series of machine
instructions before being executed.
 IAS - details

• 1000 storage locations, called words

• 1000 x 40 bit words
• Binary number
• 2 x 20 bit instructions
 IAS - details
• Set of registers (storage in CPU)
• Memory Buffer Register
• Memory Address Register
• Instruction Register
• Instruction Buffer Register
• Program Counter
• Accumulator
• Multiplier Quotient
 IAS - details

• Each number is represented by a sign bit and a 39-

bit value. A word may also contain two 20-bit
instructions, with each instruction consisting of an
8-bit operation code (opcode) specifying the
operation to be performed and a 12-bit address
designating one of the words in memory
(numbered from 0 to 999).
 Set of registers (storage in CPU)
• Memory buffer register (MBR): Contains a word
to be stored in memory or sent to the I/O unit, or is
used to receive a word from memory or from the
I/O unit.
• Memory address register (MAR): Specifies the
address in memory of the word to be written from
or read into the MBR.
• Instruction register (IR): Contains the 8-bit
opcode instruction being executed.
 Set of registers (storage in CPU)
• Instruction buffer register (IBR): Employed to hold
temporarily the right hand instruction from a word in
memory.
• Program counter (PC): Contains the address of the
next instruction-pair to be fetched from memory.
• Accumulator (AC) and multiplier quotient (MQ):
Employed to hold temporarily operands and results of
ALU operations. For example, the result of multiplying
two 40-bit numbers is an 80-bit number; the most
significant 40 bits are stored in the AC and the least
significant in the MQ.
Structure of
IAS
The IAS INSTRUCTION SET
 Commercial Computers

• In 1947, Eckert and Mauchly formed the Eckert-

Mauchly Computer Corporation to manufacture
computer commercially. Their first successful
machine was the UNIVAC I (Universal Automatic
Computer), which was commissioned by the
Bureau of the Census for the 1950 calculations.
The Eckert-Mauchly Computer Corporation
became part of the UNIVAC division of Sperry-
Rand Corporation, which went on to build a series
of successor machines.
 Commercial Computers

• The UNIVAC I was the first successful commercial

computer. It was intended for both scientific and
commercial applications. The first paper describing
the system listed matrix algebraic computations,
statistical problems, premium billings for a life
insurance company, and logistical problems as a
sample of the tasks it could perform.
 Commercial Computers
• The UNIVAC II, which had greater memory capacity and higher
performance than the UNIVAC I, was delivered in the late 1950s
and illustrates several trends that have remained characteristic of
the computer industry. First, advances in technology allow
companies to continue to build larger, more powerful computers.
Second, each company tries to make its new machines backward
compatible with the older machines.
• This means that the programs written for the older machines can
be executed on the new machine. This strategy is adopted in the
hopes of retaining the customer base; that is, when a customer
decides to buy a newer machine, he or she is likely to get it from
the same company to avoid losing the investment in programs.
 IBM

• IBM, then the major manufacturer of punched-card

processing equipment, delivered its first electronic
stored-program computer, the 701, in 1953.The 701
was intended primarily for scientific applications.
In 1955, IBM introduced the companion 702
product, which had a number of hardware features
that suited it to business applications. These were
the first of a long series of 700/7000 computers that
established IBM as the overwhelmingly dominant
computer manufacturer.
 THE SECOND GENERATION: TRANSISTOR

• The transistor is smaller, cheaper, and dissipates less

heat than a vacuum tube but can be used in the same
way as a vacuum tube to construct computers. Unlike
the vacuum tube, which requires wires, metal plates, a
glass capsule, and a vacuum, the transistor is a solid-
state device, made from silicon.
• The transistor was invented at Bell Labs in 1947 and by
the 1950s had launched an electronic revolution. It was
not until the late 1950s, however, that fully
transistorized computers were commercially available.
 Microelectronics

• Literally - “small electronics”

• A computer is made up of gates, memory cells and
interconnections
• These can be manufactured on a semiconductor
• e.g. silicon wafer - divided into a matrix of small
areas, each a few millimeters square.
 Transistor Based Computers

• Second generation machines

• NCR & RCA produced small transistor machines
• IBM 7000
• DEC - 1957
• Produced PDP-1
 Transistor Based Computers

• Second generation machines

• NCR & RCA produced small transistor machines
• IBM 7000
• DEC - 1957
• Produced PDP-1
 Generations of Computer
• Vacuum tube - 1946-1957
• Transistor - 1958-1964
• Small scale integration - 1965 on
• Up to 100 devices on a chip
• Medium scale integration - to 1971
• 100-3,000 devices on a chip
• Large scale integration - 1971-1977
• 3,000 - 100,000 devices on a chip
• Very large scale integration - 1978 -1991
• 100,000 - 100,000,000 devices on a chip
• Ultra large scale integration – 1991 -
• Over 100,000,000 devices on a chip
 Moore’s Law
• Increased density of components on chip
• Gordon Moore – co-founder of Intel
• Number of transistors on a chip will double every year
• Since 1970’s development has slowed a little
• Number of transistors doubles every 18 months
• Cost of a chip has remained almost unchanged
• Higher packing density means shorter electrical paths, giving
higher performance
• Smaller size gives increased flexibility
• Reduced power and cooling requirements
• Fewer interconnections increases reliability
Growth in CPU Transistor Count
 IBM 360 series
• 1964
• Replaced (& not compatible with) 7000 series
• First planned “family” of computers
• Similar or identical instruction sets
• Similar or identical O/S
• Increasing speed
• Increasing number of I/O ports (i.e. more terminals)
• Increased memory size
• Increased cost
• Multiplexed switch structure
 DEC PDP-8
• 1964
• First minicomputer (after miniskirt!)
• Did not need air conditioned room
• Small enough to sit on a lab bench
• $16,000
• $100k+ for IBM 360
• Embedded applications & OEM
• BUS STRUCTURE
 DEC PDP-8

• The PDP-8 bus, called the Omnibus, consists of 96

separate signal paths, used to carry control,
address, and data signals. Because all system
components share a common set of signal paths,
their use must be controlled by the CPU. This
architecture is highly flexible, allowing modules to
be plugged into the bus to create various
configurations.
DEC - PDP-8 Bus Structure
 Semiconductor Memory

• In 1970, Fairchild produced the first relatively

capacious semiconductor memory. This chip, about
the size of a single core, could hold 256 bits of
memory. It was nondestructive and much faster
than core. It took only 70 billionths of a second to
read a bit. However, the cost per bit was higher
than for that of core.
 Semiconductor Memory

• Since 1970, semiconductor memory has been

through 13 generations: 1K, 4K, 16K, 64K, 256K,
1M, 4M, 16M, 64M, 256M, 1G, 4G, and, as of this
writing, 16 Gbits on a single chip (1K=210,
1M=220, 1G=230). Each generation has provided
four times the storage density of the previous
generation, accompanied by declining cost per bit
and declining access time.
 Intel
• 1971 - 4004
• First microprocessor
• All CPU components on a single chip
• 4 bit
• Followed in 1972 by 8008
• 8 bit
• Both designed for specific applications
• 1974 - 8080
• Intel’s first general purpose microprocessor
 Speeding it up

• Branch prediction: The processor looks ahead in the

instruction code fetched from memory and predicts
which branches, or groups of instructions, are likely to
be processed next. If the processor guesses right most of
the time, it can prefetch the correct instructions and
buffer them so that the processor is kept busy.The more
sophisticated examples of this strategy predict not just
the next branch but multiple branches ahead. Thus,
branch prediction increases the amount of work
available for the processor to execute.
 Speeding it up
• Data flow analysis: The processor analyzes which instructions
are dependent on each other’s results, or data, to create an
optimized schedule of instructions. In fact, instructions are
scheduled to be executed when ready, independent of the
original program order. This prevents unnecessary delay.
• Speculative execution: Using branch prediction and data flow
analysis, some processors speculatively execute instructions
ahead of their actual appearance in the program execution,
holding the results in temporary locations. This enables the
processor to keep its execution engines as busy as possible by
executing instructions that are likely to be needed.